DE3485622D1 - Verfahren zur herstellung einer halbleiteranordnung unter anwendung eines oxidationsschritts. - Google Patents

Verfahren zur herstellung einer halbleiteranordnung unter anwendung eines oxidationsschritts.

Info

Publication number
DE3485622D1
DE3485622D1 DE8484100507T DE3485622T DE3485622D1 DE 3485622 D1 DE3485622 D1 DE 3485622D1 DE 8484100507 T DE8484100507 T DE 8484100507T DE 3485622 T DE3485622 T DE 3485622T DE 3485622 D1 DE3485622 D1 DE 3485622D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor device
oxidation step
oxidation
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484100507T
Other languages
German (de)
English (en)
Inventor
Nobuyoshi Kobayashi
Seiichi Iwata
Naoki Yamamoto
Hitochi Matsuo
Teiichi Homma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3485622D1 publication Critical patent/DE3485622D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/011Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6322Formation by thermal treatments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/405Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their composition, e.g. multilayer masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/13Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/909Controlled atmosphere
DE8484100507T 1983-01-19 1984-01-18 Verfahren zur herstellung einer halbleiteranordnung unter anwendung eines oxidationsschritts. Expired - Lifetime DE3485622D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58006868A JPS59132136A (ja) 1983-01-19 1983-01-19 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE3485622D1 true DE3485622D1 (de) 1992-05-07

Family

ID=11650210

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484100507T Expired - Lifetime DE3485622D1 (de) 1983-01-19 1984-01-18 Verfahren zur herstellung einer halbleiteranordnung unter anwendung eines oxidationsschritts.

Country Status (5)

Country Link
US (1) US4505028A (https=)
EP (1) EP0116317B1 (https=)
JP (1) JPS59132136A (https=)
KR (1) KR910007097B1 (https=)
DE (1) DE3485622D1 (https=)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4587710A (en) * 1984-06-15 1986-05-13 Gould Inc. Method of fabricating a Schottky barrier field effect transistor
US5907188A (en) * 1995-08-25 1999-05-25 Kabushiki Kaisha Toshiba Semiconductor device with conductive oxidation preventing film and method for manufacturing the same
US5789312A (en) * 1996-10-30 1998-08-04 International Business Machines Corporation Method of fabricating mid-gap metal gates compatible with ultra-thin dielectrics
JPH10223900A (ja) * 1996-12-03 1998-08-21 Toshiba Corp 半導体装置及び半導体装置の製造方法
US6893980B1 (en) * 1996-12-03 2005-05-17 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method therefor
TW577128B (en) 1997-03-05 2004-02-21 Hitachi Ltd Method for fabricating semiconductor integrated circuit device
JPH10335652A (ja) 1997-05-30 1998-12-18 Hitachi Ltd 半導体集積回路装置の製造方法
JPH10340909A (ja) * 1997-06-06 1998-12-22 Hitachi Ltd 半導体集積回路装置の製造方法
JP4283904B2 (ja) * 1997-07-11 2009-06-24 株式会社東芝 半導体装置の製造方法
US6037273A (en) * 1997-07-11 2000-03-14 Applied Materials, Inc. Method and apparatus for insitu vapor generation
US6159866A (en) 1998-03-02 2000-12-12 Applied Materials, Inc. Method for insitu vapor generation for forming an oxide on a substrate
EP0910119B1 (en) * 1997-10-14 2009-06-03 Texas Instruments Incorporated Method for oxidizing a structure during the fabrication of a semiconductor device
US6452276B1 (en) 1998-04-30 2002-09-17 International Business Machines Corporation Ultra thin, single phase, diffusion barrier for metal conductors
JPH11330468A (ja) * 1998-05-20 1999-11-30 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
US6835672B1 (en) * 1998-10-15 2004-12-28 Texas Instruments Incorporated Selective oxidation for semiconductor device fabrication
US6162694A (en) * 1998-11-25 2000-12-19 Advanced Micro Devices, Inc. Method of forming a metal gate electrode using replaced polysilicon structure
DE19901210A1 (de) * 1999-01-14 2000-07-27 Siemens Ag Halbleiterbauelement und Verfahren zu dessen Herstellung
JP2000349285A (ja) * 1999-06-04 2000-12-15 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
TW434704B (en) * 1999-06-11 2001-05-16 Univ Nat Yunlin Sci & Tech Device of amorphous WO3 ion sensitive field effect transistor (ISFET) and method for making the same
US6555407B1 (en) 1999-10-26 2003-04-29 Zarlink Semiconductor Ab Method for the controlled oxidiation of materials
GB2355850A (en) * 1999-10-26 2001-05-02 Mitel Semiconductor Ab Forming oxide layers in semiconductor layers
JP2001274154A (ja) 2000-01-18 2001-10-05 Applied Materials Inc 成膜方法、成膜装置、半導体装置及びその製造方法
US6603181B2 (en) * 2001-01-16 2003-08-05 International Business Machines Corporation MOS device having a passivated semiconductor-dielectric interface
WO2002073696A1 (en) 2001-03-12 2002-09-19 Hitachi, Ltd. Process for producing semiconductor integrated circuit device
KR100650467B1 (ko) * 2001-03-12 2006-11-28 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치 및 그 제조 방법
KR100402389B1 (ko) * 2001-03-23 2003-10-17 삼성전자주식회사 금속 게이트 형성 방법
DE10120523A1 (de) 2001-04-26 2002-10-31 Infineon Technologies Ag Verfahren zur Minimierung der Wolframoxidausdampfung bei der selektiven Seitenwandoxidation von Wolfram-Silizium-Gates
TW200416772A (en) * 2002-06-06 2004-09-01 Asml Us Inc System and method for hydrogen-rich selective oxidation
DE10236896B4 (de) * 2002-08-12 2010-08-12 Mattson Thermal Products Gmbh Vorrichtung und Verfahren zum thermischen Behandeln von Halbleiterwafern
KR100459725B1 (ko) * 2002-09-19 2004-12-03 삼성전자주식회사 금속 게이트 패턴을 갖는 반도체소자의 제조방법
JP2005101141A (ja) * 2003-09-24 2005-04-14 Renesas Technology Corp 半導体集積回路装置およびその製造方法
US7981785B2 (en) * 2004-03-01 2011-07-19 Tokyo Electron Limited Method for manufacturing semiconductor device and plasma oxidation method
KR100966086B1 (ko) * 2005-03-08 2010-06-28 가부시키가이샤 히다치 고쿠사이 덴키 반도체장치의 제조 방법 및 기판처리장치
JP2007165788A (ja) * 2005-12-16 2007-06-28 Tokyo Electron Ltd 金属系膜の脱炭素処理方法、成膜方法および半導体装置の製造方法
US7951728B2 (en) * 2007-09-24 2011-05-31 Applied Materials, Inc. Method of improving oxide growth rate of selective oxidation processes
US8889565B2 (en) * 2009-02-13 2014-11-18 Asm International N.V. Selective removal of oxygen from metal-containing materials
US9127340B2 (en) * 2009-02-13 2015-09-08 Asm International N.V. Selective oxidation process

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3679492A (en) * 1970-03-23 1972-07-25 Ibm Process for making mosfet's
NL164424C (nl) * 1970-06-04 1980-12-15 Philips Nv Werkwijze voor het vervaardigen van een veldeffect- transistor met een geisoleerde stuurelektrode, waarbij een door een tegen oxydatie maskerende laag vrijgelaten deel van het oppervlak van een siliciumlichaam aan een oxydatiebehandeling wordt onderworpen ter verkrijging van een althans gedeeltelijk in het siliciumlichaam verzonken siliciumoxydelaag.
US3959025A (en) * 1974-05-01 1976-05-25 Rca Corporation Method of making an insulated gate field effect transistor
US4093503A (en) * 1977-03-07 1978-06-06 International Business Machines Corporation Method for fabricating ultra-narrow metallic lines
JPS5693314A (en) * 1979-12-26 1981-07-28 Fujitsu Ltd Ion injector

Also Published As

Publication number Publication date
JPH0458688B2 (https=) 1992-09-18
EP0116317A2 (en) 1984-08-22
EP0116317A3 (en) 1987-07-22
JPS59132136A (ja) 1984-07-30
US4505028A (en) 1985-03-19
EP0116317B1 (en) 1992-04-01
KR840007307A (ko) 1984-12-06
KR910007097B1 (ko) 1991-09-18

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