DE3434552A1 - Verfahren zur bildung einer pn-grenzschicht - Google Patents

Verfahren zur bildung einer pn-grenzschicht

Info

Publication number
DE3434552A1
DE3434552A1 DE19843434552 DE3434552A DE3434552A1 DE 3434552 A1 DE3434552 A1 DE 3434552A1 DE 19843434552 DE19843434552 DE 19843434552 DE 3434552 A DE3434552 A DE 3434552A DE 3434552 A1 DE3434552 A1 DE 3434552A1
Authority
DE
Germany
Prior art keywords
ion implantation
mass separation
annealing
forming
solar cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19843434552
Other languages
German (de)
English (en)
Other versions
DE3434552C2 (enrdf_load_stackoverflow
Inventor
Haruo Hino Itoh
Tadashi Tokio/Tokyo Saitoh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
New Energy and Industrial Technology Development Organization
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3434552A1 publication Critical patent/DE3434552A1/de
Application granted granted Critical
Publication of DE3434552C2 publication Critical patent/DE3434552C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H01L21/2236—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase from or into a plasma phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Plasma & Fusion (AREA)
  • Photovoltaic Devices (AREA)
DE19843434552 1983-09-21 1984-09-20 Verfahren zur bildung einer pn-grenzschicht Granted DE3434552A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58172987A JPS6065528A (ja) 1983-09-21 1983-09-21 ｐｎ接合形成法

Publications (2)

Publication Number Publication Date
DE3434552A1 true DE3434552A1 (de) 1985-04-11
DE3434552C2 DE3434552C2 (enrdf_load_stackoverflow) 1989-10-19

Family

ID=15952071

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19843434552 Granted DE3434552A1 (de) 1983-09-21 1984-09-20 Verfahren zur bildung einer pn-grenzschicht

Country Status (3)

Country Link
JP (1) JPS6065528A (enrdf_load_stackoverflow)
DE (1) DE3434552A1 (enrdf_load_stackoverflow)
FR (1) FR2552265B1 (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3727825A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschichtsolarmodul aus kristallinem silizium
DE3727826A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschicht-solarmodul aus kristallinem silizium
EP0999582A3 (en) * 1998-11-05 2000-08-30 Chartered Semiconductor Manufacturing Pte Ltd. N Type impurity doping using implantation of P2+ions or As2+ions
EP2637220A1 (en) * 2012-03-05 2013-09-11 LG Electronics, Inc. Solar cell and method for manufacturing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1950069B2 (de) * 1968-10-04 1981-10-08 Tokyo Shibaura Electric Co., Ltd., Kawasaki, Kanagawa Verfahren zum Herstellung einer Halbleiteranordnung

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1950069B2 (de) * 1968-10-04 1981-10-08 Tokyo Shibaura Electric Co., Ltd., Kawasaki, Kanagawa Verfahren zum Herstellung einer Halbleiteranordnung

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP-Z.: Japanese Journal of Applied Physics, Vol. 21, 1982, Supplement 21-2, S. 7-11 *
US-Z.: Review of Scientific Instruments, Vol. 52, H. 7, Juli 1981, S. 1110-1111 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3727825A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschichtsolarmodul aus kristallinem silizium
DE3727826A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschicht-solarmodul aus kristallinem silizium
EP0999582A3 (en) * 1998-11-05 2000-08-30 Chartered Semiconductor Manufacturing Pte Ltd. N Type impurity doping using implantation of P2+ions or As2+ions
EP2637220A1 (en) * 2012-03-05 2013-09-11 LG Electronics, Inc. Solar cell and method for manufacturing the same
US10355158B2 (en) 2012-03-05 2019-07-16 Lg Electronics Inc. Solar cell and method for manufacturing the same

Also Published As

Publication number Publication date
JPS6065528A (ja) 1985-04-15
FR2552265A1 (fr) 1985-03-22
FR2552265B1 (fr) 1990-02-02
DE3434552C2 (enrdf_load_stackoverflow) 1989-10-19

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBEL-HOPF, U., DIPL.-CHEM. DR.RER.NAT., PAT.-ANWAELTE, 8000 MUENCHEN

8327 Change in the person/name/address of the patent owner

Owner name: NEW ENERGY AND INDUSTRIAL TECHNOLOGY DEVELOPMENT O

8328 Change in the person/name/address of the agent

Free format text: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBEL-HOPF, U., DIPL.-CHEM. DR.RER.NAT. GROENING, H.,DIPL.-ING., PAT.-ANWAELTE, 8000 MUENCHEN