DE3381215D1 - Integrierte halbleiterschaltungen und verfahren zur herstellung. - Google Patents

Integrierte halbleiterschaltungen und verfahren zur herstellung.

Info

Publication number
DE3381215D1
DE3381215D1 DE8383200562T DE3381215T DE3381215D1 DE 3381215 D1 DE3381215 D1 DE 3381215D1 DE 8383200562 T DE8383200562 T DE 8383200562T DE 3381215 T DE3381215 T DE 3381215T DE 3381215 D1 DE3381215 D1 DE 3381215D1
Authority
DE
Germany
Prior art keywords
production
integrated semiconductor
semiconductor circuits
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8383200562T
Other languages
English (en)
Inventor
Sheldon Chil Pin Lim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3381215D1 publication Critical patent/DE3381215D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/915—Active solid-state devices, e.g. transistors, solid-state diodes with titanium nitride portion or region
DE8383200562T 1982-04-23 1983-04-19 Integrierte halbleiterschaltungen und verfahren zur herstellung. Expired - Lifetime DE3381215D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/371,147 US4491860A (en) 1982-04-23 1982-04-23 TiW2 N Fusible links in semiconductor integrated circuits

Publications (1)

Publication Number Publication Date
DE3381215D1 true DE3381215D1 (de) 1990-03-15

Family

ID=23462680

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383200562T Expired - Lifetime DE3381215D1 (de) 1982-04-23 1983-04-19 Integrierte halbleiterschaltungen und verfahren zur herstellung.

Country Status (4)

Country Link
US (1) US4491860A (de)
EP (1) EP0092871B1 (de)
JP (1) JPS5948554B2 (de)
DE (1) DE3381215D1 (de)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60169169A (ja) * 1984-02-13 1985-09-02 Fujitsu Ltd 半導体装置の製造方法
US4920071A (en) * 1985-03-15 1990-04-24 Fairchild Camera And Instrument Corporation High temperature interconnect system for an integrated circuit
US4811078A (en) * 1985-05-01 1989-03-07 Texas Instruments Incorporated Integrated circuit device and process with tin capacitors
US4956308A (en) * 1987-01-20 1990-09-11 Itt Corporation Method of making self-aligned field-effect transistor
US4782032A (en) * 1987-01-12 1988-11-01 Itt Gallium Arsenide Technology Center, A Division Of Itt Corporation Method of making self-aligned GaAs devices having TiWNx gate/interconnect
US4728534A (en) * 1986-08-04 1988-03-01 Motorola, Inc. Thick film conductor structure
US5436496A (en) * 1986-08-29 1995-07-25 National Semiconductor Corporation Vertical fuse device
DE3641299A1 (de) * 1986-12-03 1988-06-16 Philips Patentverwaltung Integrierte halbleiter-schaltung mit mehrlagenverdrahtung
US4935801A (en) * 1987-01-27 1990-06-19 Inmos Corporation Metallic fuse with optically absorptive layer
DE3714647C2 (de) * 1987-05-02 1993-10-07 Telefunken Microelectron Integrierte Schaltungsanordnung
JPS6417555U (de) * 1987-07-22 1989-01-27
US4787958A (en) * 1987-08-28 1988-11-29 Motorola Inc. Method of chemically etching TiW and/or TiWN
NL8800220A (nl) * 1988-01-29 1989-08-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij een metalen geleiderspoor op een oppervlak van een halfgeleiderlichaam wordt gebracht.
US4795499A (en) * 1988-03-28 1989-01-03 Ridenour Ralph Gaylord Duct mount sensor assembly
US4880708A (en) * 1988-07-05 1989-11-14 Motorola, Inc. Metallization scheme providing adhesion and barrier properties
US4927505A (en) * 1988-07-05 1990-05-22 Motorola Inc. Metallization scheme providing adhesion and barrier properties
DE3930655A1 (de) * 1988-09-13 1990-03-22 Mitsubishi Electric Corp Halbleitervorrichtung mit vielschichtig gestapelter verbindungsschicht und verfahren zu deren herstellung
US5015604A (en) * 1989-08-18 1991-05-14 North American Philips Corp., Signetics Division Fabrication method using oxidation to control size of fusible link
US5780323A (en) 1990-04-12 1998-07-14 Actel Corporation Fabrication method for metal-to-metal antifuses incorporating a tungsten via plug
US5614756A (en) 1990-04-12 1997-03-25 Actel Corporation Metal-to-metal antifuse with conductive
US5211807A (en) * 1991-07-02 1993-05-18 Microelectronics Computer & Technology Titanium-tungsten etching solutions
US5241496A (en) * 1991-08-19 1993-08-31 Micron Technology, Inc. Array of read-only memory cells, eacch of which has a one-time, voltage-programmable antifuse element constructed within a trench shared by a pair of cells
US5244836A (en) * 1991-12-30 1993-09-14 North American Philips Corporation Method of manufacturing fusible links in semiconductor devices
EP0558176A1 (de) * 1992-02-26 1993-09-01 Actel Corporation Metall-Metall-Antischmelzsicherung mit verbesserter Diffusionsbarriere-Schicht
KR100272019B1 (ko) * 1992-04-28 2000-12-01 요트.게.아. 롤페즈 표면에 tixw1-x 장벽층이 제공되는 반도체 몸체를 갖는 반도체 장치 및 그 제조 방법
US5917229A (en) * 1994-02-08 1999-06-29 Prolinx Labs Corporation Programmable/reprogrammable printed circuit board using fuse and/or antifuse as interconnect
US5726482A (en) * 1994-02-08 1998-03-10 Prolinx Labs Corporation Device-under-test card for a burn-in board
US5834824A (en) * 1994-02-08 1998-11-10 Prolinx Labs Corporation Use of conductive particles in a nonconductive body as an integrated circuit antifuse
US5808351A (en) * 1994-02-08 1998-09-15 Prolinx Labs Corporation Programmable/reprogramable structure using fuses and antifuses
TW279229B (en) * 1994-12-29 1996-06-21 Siemens Ag Double density fuse bank for the laser break-link programming of an integrated-circuit
US5962815A (en) * 1995-01-18 1999-10-05 Prolinx Labs Corporation Antifuse interconnect between two conducting layers of a printed circuit board
US5906042A (en) * 1995-10-04 1999-05-25 Prolinx Labs Corporation Method and structure to interconnect traces of two conductive layers in a printed circuit board
US5767575A (en) * 1995-10-17 1998-06-16 Prolinx Labs Corporation Ball grid array structure and method for packaging an integrated circuit chip
US5872338A (en) * 1996-04-10 1999-02-16 Prolinx Labs Corporation Multilayer board having insulating isolation rings
US5933714A (en) * 1997-01-08 1999-08-03 Siemens Aktiengesellschaft Double density fuse bank for the laser break-link programming of an integrated circuit
US6015505A (en) * 1997-10-30 2000-01-18 International Business Machines Corporation Process improvements for titanium-tungsten etching in the presence of electroplated C4's
US6034427A (en) * 1998-01-28 2000-03-07 Prolinx Labs Corporation Ball grid array structure and method for packaging an integrated circuit chip
US6277674B1 (en) * 1998-10-02 2001-08-21 Micron Technology, Inc. Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same
US20070190751A1 (en) * 1999-03-29 2007-08-16 Marr Kenneth W Semiconductor fuses and methods for fabricating and programming the same
US6646912B2 (en) * 2001-06-05 2003-11-11 Hewlett-Packard Development Company, Lp. Non-volatile memory
US6927472B2 (en) 2001-11-14 2005-08-09 International Business Machines Corporation Fuse structure and method to form the same
US20040038458A1 (en) * 2002-08-23 2004-02-26 Marr Kenneth W. Semiconductor fuses, semiconductor devices containing the same, and methods of making and using the same
US6972470B2 (en) * 2004-03-30 2005-12-06 Texas Instruments Incorporated Dual metal Schottky diode
DE102005052087A1 (de) * 2005-10-28 2007-05-03 Kmw Kaufbeurer Mikrosysteme Wiedemann Gmbh Sensor
US20070205430A1 (en) * 2006-03-03 2007-09-06 Collins David S Method and structure of refractory metal reach through in bipolar transistor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US28481A (en) * 1860-05-29 Mosaic veneer
US4179533A (en) * 1978-04-25 1979-12-18 The United States Of America As Represented By The Secretary Of The Navy Multi-refractory films for gallium arsenide devices
US4209894A (en) * 1978-04-27 1980-07-01 Texas Instruments Incorporated Fusible-link semiconductor memory
FR2530383A1 (fr) * 1982-07-13 1984-01-20 Thomson Csf Circuit integre monolithique comprenant une partie logique schottky et une memoire programmable a fusibles

Also Published As

Publication number Publication date
EP0092871A2 (de) 1983-11-02
EP0092871B1 (de) 1990-02-07
EP0092871A3 (en) 1985-09-04
JPS58212163A (ja) 1983-12-09
US4491860A (en) 1985-01-01
JPS5948554B2 (ja) 1984-11-27

Similar Documents

Publication Publication Date Title
DE3381215D1 (de) Integrierte halbleiterschaltungen und verfahren zur herstellung.
DE3685124D1 (de) Integriertes halbleiterschaltungsbauelement und verfahren zu seiner herstellung.
DE3485880D1 (de) Verfahren zur herstellung von halbleiteranordnungen.
DE3650323D1 (de) VLSI-Chip und Verfahren zur Herstellung.
DE3888885D1 (de) Halbleiteranordnung und verfahren zur herstellung.
DE68924132D1 (de) Halbleiterbauteil und Verfahren zur dessen Herstellung.
DE3767431D1 (de) Verfahren zur herstellung von halbleiterbauelementen.
DE3379364D1 (en) Bipolar transistor integrated circuit and method for manufacturing
DE3689735D1 (de) Verfahren und Gerät zur Herstellung von Halbleitervorrichtungen.
DE3586666T2 (de) Karte mit ic-baustein und verfahren zur herstellung derselben.
DE3782972T2 (de) Ic-karte und verfahren zur herstellung derselben.
DE3381711D1 (de) Halbleiteranordnung und verfahren zu deren herstellung.
DE3578656D1 (de) Verfahren zur herstellung nitrierter sio2-schichten fuer integrierte halbleiterschaltungen.
DE3786785T2 (de) Verfahren zur herstellung von mos-bauelementen für integrierte schaltungen.
DE3856150T2 (de) Halbleiteranordnung und verfahren zur herstellung
DE3485089D1 (de) Verfahren zur herstellung von halbleitervorrichtungen.
DE68923686D1 (de) Halbleiterkarte und verfahren zur herstellung.
DE3767155D1 (de) Biegsame halbleiterplatte und verfahren zur herstellung.
DE3688711D1 (de) Integrierte halbleiterschaltungsanordnung und verfahren zu ihrer herstellung.
DE3381683D1 (de) Feldeffekttransistor und verfahren zu seiner herstellung.
DE69021998T2 (de) Verfahren zur herstellung von komplementären, integrierten halbleiterschaltungen.
DE3788841D1 (de) Halbleiterlaservorrichtung und Verfahren zur Herstellung derselben.
DE3381448D1 (de) Verfahren und einrichtung zur herstellung von ns-programmen.
DE69114187D1 (de) Vorrichtung und Verfahren zur Herstellung von Halbleitereinrichtungen.
DE3765796D1 (de) Halbleiterbauelement und verfahren zu dessen herstellung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8339 Ceased/non-payment of the annual fee