DE69114187D1 - Vorrichtung und Verfahren zur Herstellung von Halbleitereinrichtungen. - Google Patents

Vorrichtung und Verfahren zur Herstellung von Halbleitereinrichtungen.

Info

Publication number
DE69114187D1
DE69114187D1 DE69114187T DE69114187T DE69114187D1 DE 69114187 D1 DE69114187 D1 DE 69114187D1 DE 69114187 T DE69114187 T DE 69114187T DE 69114187 T DE69114187 T DE 69114187T DE 69114187 D1 DE69114187 D1 DE 69114187D1
Authority
DE
Germany
Prior art keywords
semiconductor devices
manufacturing semiconductor
manufacturing
devices
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69114187T
Other languages
English (en)
Other versions
DE69114187T2 (de
Inventor
Mitsuo Sato
Hazime Shaura
Megumi Tateishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Publication of DE69114187D1 publication Critical patent/DE69114187D1/de
Application granted granted Critical
Publication of DE69114187T2 publication Critical patent/DE69114187T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Thyristors (AREA)
  • Formation Of Insulating Films (AREA)
DE69114187T 1990-06-14 1991-06-13 Vorrichtung und Verfahren zur Herstellung von Halbleitereinrichtungen. Expired - Fee Related DE69114187T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2155781A JP2504607B2 (ja) 1990-06-14 1990-06-14 半導体製造装置及び製造方法

Publications (2)

Publication Number Publication Date
DE69114187D1 true DE69114187D1 (de) 1995-12-07
DE69114187T2 DE69114187T2 (de) 1996-04-25

Family

ID=15613273

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69114187T Expired - Fee Related DE69114187T2 (de) 1990-06-14 1991-06-13 Vorrichtung und Verfahren zur Herstellung von Halbleitereinrichtungen.

Country Status (4)

Country Link
US (1) US5164335A (de)
EP (1) EP0461650B1 (de)
JP (1) JP2504607B2 (de)
DE (1) DE69114187T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0734314B1 (de) * 1994-09-09 2003-01-08 Koninklijke Philips Electronics N.V. Verfahren zum herstellen einer form zur verwendung in der herstellung eines optischen elements, das optische unterelemente in musterform angeordnet enthält und vorrichtung zur durchführung des verfahrens
US5819394A (en) * 1995-02-22 1998-10-13 Transition Automation, Inc. Method of making board matched nested support fixture
JP3486557B2 (ja) * 1998-07-30 2004-01-13 宮崎沖電気株式会社 トランスファ成形装置及び半導体装置の製造方法
KR100546372B1 (ko) * 2003-08-28 2006-01-26 삼성전자주식회사 웨이퍼 레벨 칩 사이즈 패키지의 제조방법
CN106783713A (zh) * 2015-11-20 2017-05-31 环维电子(上海)有限公司 Sip模组的制造、拾取方法和设备及emi电磁屏蔽层制造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5434774A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Article transfer device
JPS56151516A (en) * 1980-04-28 1981-11-24 Hitachi Ltd Mold for plastic molding
JPS58212125A (ja) * 1982-06-02 1983-12-09 Hitachi Ltd 熱処理用治具
JPS5945110A (ja) * 1982-09-08 1984-03-13 Tachibana Yoki Kk プラスチツク成形品離型装置
JPS6167109U (de) * 1984-10-05 1986-05-08
US4724325A (en) * 1986-04-23 1988-02-09 Eaton Corporation Adhesion cooling for an ion implantation system
JPS6395634A (ja) * 1986-10-09 1988-04-26 Mitsubishi Electric Corp 半導体装置の樹脂封止装置
JPS63141370A (ja) * 1986-12-03 1988-06-13 Fuji Electric Co Ltd サイリスタの製造方法
US4835704A (en) * 1986-12-29 1989-05-30 General Electric Company Adaptive lithography system to provide high density interconnect
JPH0541548Y2 (de) * 1987-10-01 1993-10-20
DE3885240D1 (de) * 1987-12-03 1993-12-02 Balzers Hochvakuum Verfahren und Vorrichtung zur Übertragung thermischer Energie auf bzw. von einem plattenförmigen Substrat.
US4904610A (en) * 1988-01-27 1990-02-27 General Instrument Corporation Wafer level process for fabricating passivated semiconductor devices
US4942139A (en) * 1988-02-01 1990-07-17 General Instrument Corporation Method of fabricating a brazed glass pre-passivated chip rectifier
JP2684677B2 (ja) * 1988-05-25 1997-12-03 株式会社日立製作所 半導体装置の製造方法
US4868490A (en) * 1988-09-14 1989-09-19 Texas Instruments Incorporated Method and apparatus for sheet resistance measurement of a wafer during a fabrication process

Also Published As

Publication number Publication date
JP2504607B2 (ja) 1996-06-05
US5164335A (en) 1992-11-17
JPH0448639A (ja) 1992-02-18
EP0461650B1 (de) 1995-11-02
DE69114187T2 (de) 1996-04-25
EP0461650A1 (de) 1991-12-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee