DE3276285D1 - Manufacture of integrated circuits by masterslice methods - Google Patents

Manufacture of integrated circuits by masterslice methods

Info

Publication number
DE3276285D1
DE3276285D1 DE8282304790T DE3276285T DE3276285D1 DE 3276285 D1 DE3276285 D1 DE 3276285D1 DE 8282304790 T DE8282304790 T DE 8282304790T DE 3276285 T DE3276285 T DE 3276285T DE 3276285 D1 DE3276285 D1 DE 3276285D1
Authority
DE
Germany
Prior art keywords
masterslice
manufacture
methods
integrated circuits
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282304790T
Other languages
German (de)
English (en)
Inventor
Tetsu Tanizawa
Hitoshi Omichi
Yoshiharu Mitono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=15327225&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3276285(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3276285D1 publication Critical patent/DE3276285D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H01L23/5286—Arrangements of power or ground buses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE8282304790T 1981-09-10 1982-09-10 Manufacture of integrated circuits by masterslice methods Expired DE3276285D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56142942A JPS5844743A (ja) 1981-09-10 1981-09-10 半導体集積回路

Publications (1)

Publication Number Publication Date
DE3276285D1 true DE3276285D1 (en) 1987-06-11

Family

ID=15327225

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282304790T Expired DE3276285D1 (en) 1981-09-10 1982-09-10 Manufacture of integrated circuits by masterslice methods

Country Status (5)

Country Link
US (1) US4499484A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0074825B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5844743A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3276285D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
IE (1) IE53851B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5984542A (ja) * 1982-11-08 1984-05-16 Nec Corp 高周波半導体集積回路
JPS59167049A (ja) * 1983-03-14 1984-09-20 Nec Corp 半導体装置
US4583111A (en) * 1983-09-09 1986-04-15 Fairchild Semiconductor Corporation Integrated circuit chip wiring arrangement providing reduced circuit inductance and controlled voltage gradients
JPS60101951A (ja) * 1983-11-08 1985-06-06 Sanyo Electric Co Ltd ゲ−トアレイ
EP0158222B1 (en) * 1984-03-29 1990-08-29 Sanyo Electric Co., Ltd. Semiconductor integrated circuit having multiple-layered connection
US4570176A (en) * 1984-04-16 1986-02-11 At&T Bell Laboratories CMOS Cell array with transistor isolation
US4774559A (en) * 1984-12-03 1988-09-27 International Business Machines Corporation Integrated circuit chip structure wiring and circuitry for driving highly capacitive on chip wiring nets
JPS61181144A (ja) * 1985-02-06 1986-08-13 Nec Corp モノリシツク集積回路
JPS61241964A (ja) * 1985-04-19 1986-10-28 Hitachi Ltd 半導体装置
US4977441A (en) * 1985-12-25 1990-12-11 Hitachi, Ltd. Semiconductor device and tape carrier
JP2650133B2 (ja) * 1986-08-08 1997-09-03 富士通株式会社 半導体集積回路装置
JPH083633B2 (ja) * 1987-05-08 1996-01-17 タムラ化研株式会社 耐熱性皮膜形成用感光性組成物
JPS6435934A (en) * 1987-07-30 1989-02-07 Hitachi Ltd Semiconductor integrated circuit device
KR920005863B1 (ko) * 1988-08-12 1992-07-23 산요덴끼 가부시끼가이샤 반도체 집적회로
DE68929487T2 (de) * 1989-02-14 2004-07-22 Koninklijke Philips Electronics N.V. Versorgungssteckerstift-Anordnung für eine integrierte Schaltung
US5126822A (en) * 1989-02-14 1992-06-30 North American Philips Corporation Supply pin rearrangement for an I.C.
JPH0364735A (ja) * 1989-08-03 1991-03-20 Sharp Corp アクティブマトリクス表示装置
WO1995017007A1 (en) * 1993-12-14 1995-06-22 Oki America, Inc. Efficient routing method and resulting structure for integrated circuits
JP2954165B1 (ja) * 1998-05-20 1999-09-27 日本電気アイシーマイコンシステム株式会社 半導体装置
US6586828B2 (en) * 2001-10-17 2003-07-01 International Business Machines Corporation Integrated circuit bus grid having wires with pre-selected variable widths

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US26803A (en) * 1860-01-10 Clapboard
US3225261A (en) 1963-11-19 1965-12-21 Fairchild Camera Instr Co High frequency power transistor
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US4006492A (en) * 1975-06-23 1977-02-01 International Business Machines Corporation High density semiconductor chip organization
US4161662A (en) * 1976-01-22 1979-07-17 Motorola, Inc. Standardized digital logic chip
US4249193A (en) * 1978-05-25 1981-02-03 International Business Machines Corporation LSI Semiconductor device and fabrication thereof
JPS5543840A (en) * 1978-09-25 1980-03-27 Hitachi Ltd Power distributing structure of iil element
US4295149A (en) * 1978-12-29 1981-10-13 International Business Machines Corporation Master image chip organization technique or method

Also Published As

Publication number Publication date
IE822222L (en) 1983-03-10
US4499484A (en) 1985-02-12
EP0074825B1 (en) 1987-05-06
JPS643057B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-01-19
EP0074825A3 (en) 1985-01-30
EP0074825B2 (en) 1990-03-21
IE53851B1 (en) 1989-03-29
EP0074825A2 (en) 1983-03-23
JPS5844743A (ja) 1983-03-15

Similar Documents

Publication Publication Date Title
DE3276285D1 (en) Manufacture of integrated circuits by masterslice methods
IE821157L (en) Semiconductor manufacture
JPS57122592A (en) Method of producing hybrid integrated circuit
DE3271346D1 (en) Method of making integrated bipolar transistors of very small dimensions
JPS5745952A (en) Method of producing integrated circuit
JPS562652A (en) Method of fabricating integrated mos circuit
GB2034059B (en) Manufacture of integrated circuits
DE3270169D1 (en) Integrated circuit photomask
GB2083947B (en) Method of making integrated circuits
JPS5779650A (en) Method of producing integrated circuit
JPS57160194A (en) Method of producing microminature circuit
DE3279612D1 (en) Methods of forming electronic microcircuits
GB2106719B (en) Process for the preparation of flexible circuits
JPS5571036A (en) Method of manufacturing integrated circuit
DE3279613D1 (en) Process for manufacturing an integrated circuit structure
DE3174777D1 (en) Method of fabricating integrated circuit structure
JPS5599779A (en) Method of fabricating integrated mos circuit
GB2100925B (en) Fabricating integrated circuits
JPS57178367A (en) Method of producing integrated planar transistor
JPS5727053A (en) Method of producing integrated circuit
JPS566497A (en) Method of manufacturing integrated circuit
JPS5743488A (en) Method of producing hybrid integrated circuit
IL65455A0 (en) Manufacture of electrical circuits
JPS57166079A (en) Method of producing semiconductor integrated circuit
GB2104285B (en) Manufacture of integrated circuits

Legal Events

Date Code Title Description
8363 Opposition against the patent
8366 Restricted maintained after opposition proceedings
8339 Ceased/non-payment of the annual fee