DE3264564D1 - Phase-locked loop circuit - Google Patents

Phase-locked loop circuit

Info

Publication number
DE3264564D1
DE3264564D1 DE8282304712T DE3264564T DE3264564D1 DE 3264564 D1 DE3264564 D1 DE 3264564D1 DE 8282304712 T DE8282304712 T DE 8282304712T DE 3264564 T DE3264564 T DE 3264564T DE 3264564 D1 DE3264564 D1 DE 3264564D1
Authority
DE
Germany
Prior art keywords
phase
locked loop
loop circuit
circuit
locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282304712T
Other languages
English (en)
Inventor
Toshiro Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3264564D1 publication Critical patent/DE3264564D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE8282304712T 1981-09-08 1982-09-08 Phase-locked loop circuit Expired DE3264564D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56141554A JPS5850827A (ja) 1981-09-08 1981-09-08 フェーズ・ロック・ループ回路

Publications (1)

Publication Number Publication Date
DE3264564D1 true DE3264564D1 (en) 1985-08-08

Family

ID=15294662

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282304712T Expired DE3264564D1 (en) 1981-09-08 1982-09-08 Phase-locked loop circuit

Country Status (4)

Country Link
US (1) US4542351A (de)
EP (1) EP0074793B1 (de)
JP (1) JPS5850827A (de)
DE (1) DE3264564D1 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
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JPS60200635A (ja) * 1984-03-26 1985-10-11 Victor Co Of Japan Ltd デジタル信号復調装置のビツトクロツク信号発生装置
US4628461A (en) * 1984-04-30 1986-12-09 Advanced Micro Devices, Inc. Phase detector
JPH0640406B2 (ja) * 1985-01-31 1994-05-25 ソニー株式会社 情報信号再生装置のドラムサ−ボ回路
JPH0732391B2 (ja) * 1985-05-28 1995-04-10 日本電気株式会社 クロック同期回路
US4796243A (en) * 1985-06-21 1989-01-03 Nec Corporation Time base correcting apparatus
US4808884A (en) * 1985-12-02 1989-02-28 Western Digital Corporation High order digital phase-locked loop system
US4835481A (en) * 1986-09-30 1989-05-30 Siemens Aktiengesellschaft Circuit arrangement for generating a clock signal which is synchronous in respect of frequency to a reference frequency
US4712076A (en) * 1986-10-27 1987-12-08 Magnetic Peripherals Inc. Circuit for phase locking a clock signal to a series of pulses
US4837643A (en) * 1986-11-07 1989-06-06 Archive Corporation Circuit for controlling frequency and phase of voltage controlled oscillator in a data smoother for a streaming cartridge tape drive
IT1197969B (it) * 1986-11-12 1988-12-21 Honeywell Inf Systems Circuito ad aggancio di fase
US4787097A (en) * 1987-02-11 1988-11-22 International Business Machines Corporation NRZ phase-locked loop circuit with associated monitor and recovery circuitry
JP2526633B2 (ja) * 1987-05-14 1996-08-21 日本電気株式会社 位相同期回路
JP2661062B2 (ja) * 1987-09-21 1997-10-08 ソニー株式会社 データ再生装置
JPH01293718A (ja) * 1988-05-20 1989-11-27 Hitachi Ltd 位相同期回路
JPH0722380B2 (ja) * 1988-10-27 1995-03-08 富士通株式会社 映像信号用位相ロツク回路
JP2746727B2 (ja) * 1990-04-26 1998-05-06 株式会社日立製作所 位相同期回路、半導体集積回路および記録再生装置
JPH07500937A (ja) * 1990-08-01 1995-01-26 マックスター・コーポレーション デジタル・セクタ・サーボ用のサンプル・データ・位置誤差信号の検出
US5309093A (en) * 1992-03-16 1994-05-03 Aderhold Daniel O Electronic speed signal ratio measuring apparatus for controlling operations
JP3033654B2 (ja) * 1993-08-23 2000-04-17 日本電気株式会社 Ｐｌｌ周波数シンセサイザ
AUPM972594A0 (en) * 1994-11-28 1994-12-22 Curtin University Of Technology Steered frequency phase locked loop
KR970003097B1 (ko) * 1994-12-02 1997-03-14 양승택 다단 제어구조를 갖는 고속 비트동기 장치
KR100546541B1 (ko) * 1995-08-14 2006-03-23 가부시끼가이샤 히다치 세이사꾸쇼 Ｐｌｌ회로및영상재생장치
US6505304B1 (en) * 1998-07-22 2003-01-07 Oki Electric Industry Co, Ltd. Timer apparatus which can simultaneously control a plurality of timers
JP3837277B2 (ja) * 2000-06-30 2006-10-25 株式会社東芝 銅の研磨に用いる化学機械研磨用水系分散体及び化学機械研磨方法
GB2377345B (en) * 2001-07-02 2004-06-16 Motorola Inc Time synchronisation system and method
US7317778B2 (en) * 2003-01-31 2008-01-08 Hewlett-Packard Development Company, L.P. Phase-locked loop control circuit
US6812797B1 (en) * 2003-05-30 2004-11-02 Agere Systems Inc. Phase-locked loop with loop select signal based switching between frequency detection and phase detection
JP3939715B2 (ja) * 2004-08-20 2007-07-04 日本テキサス・インスツルメンツ株式会社 位相同期ループ回路
CN100382431C (zh) * 2005-03-10 2008-04-16 上海交通大学 双校正软件锁相环实现方法
US7420428B2 (en) 2006-07-13 2008-09-02 Itt Manufacturing Enterprises, Inc. Low noise phase locked loop with a high precision lock detector
TWI332318B (en) * 2006-09-07 2010-10-21 Realtek Semiconductor Corp Multiloop phase locked loop circuit
US7848474B2 (en) * 2007-07-09 2010-12-07 Cortina Systems, Inc. Signal timing phase selection and timing acquisition apparatus and techniques
US8781053B2 (en) 2007-12-14 2014-07-15 Conversant Intellectual Property Management Incorporated Clock reproducing and timing method in a system having a plurality of devices
US8222932B2 (en) * 2010-02-23 2012-07-17 Agilent Technologies, Inc. Phase-locked loop with switched phase detectors
CN104022502A (zh) * 2014-06-09 2014-09-03 安徽赛瑞储能设备有限公司 一种用于能量转换系统的电网锁相方法
KR20210073299A (ko) * 2019-12-10 2021-06-18 삼성전자주식회사 클록 데이터 복원 회로 및 이를 포함하는 장치

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3950658A (en) * 1974-10-15 1976-04-13 International Business Machines Corporation Data separator with compensation circuit
JPS5252616A (en) * 1975-10-27 1977-04-27 Fujitsu Ltd Synchronous signal generating circuit in data reading device
US4017806A (en) * 1976-01-26 1977-04-12 Sperry Rand Corporation Phase locked oscillator
JPS5394755A (en) * 1977-01-31 1978-08-19 Toshiba Corp Frequency feedback type circuit
JPS5551100U (de) * 1978-10-02 1980-04-03
US4287480A (en) * 1980-01-10 1981-09-01 Sperry Corporation Phase locked loop out-of-lock detector
GB2084415A (en) * 1980-09-12 1982-04-07 Sony Corp Apparatus for regenerating a clock pulse signal from a stream of data
US4365211A (en) * 1980-10-31 1982-12-21 Westinghouse Electric Corp. Phase-locked loop with initialization loop

Also Published As

Publication number Publication date
EP0074793A1 (de) 1983-03-23
JPS5850827A (ja) 1983-03-25
US4542351A (en) 1985-09-17
JPH0442752B2 (de) 1992-07-14
EP0074793B1 (de) 1985-07-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee