DE3224604C2 - - Google Patents
Info
- Publication number
- DE3224604C2 DE3224604C2 DE3224604A DE3224604A DE3224604C2 DE 3224604 C2 DE3224604 C2 DE 3224604C2 DE 3224604 A DE3224604 A DE 3224604A DE 3224604 A DE3224604 A DE 3224604A DE 3224604 C2 DE3224604 C2 DE 3224604C2
- Authority
- DE
- Germany
- Prior art keywords
- film
- semiconductor
- insulating film
- crystal semiconductor
- window
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H10P14/3248—
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- H10P14/2905—
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- H10P14/2921—
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- H10P14/2922—
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- H10P14/2925—
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- H10P14/3211—
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- H10P14/3238—
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- H10P14/3244—
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- H10P14/3256—
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- H10P14/3411—
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- H10P14/3458—
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- H10P14/3808—
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- H10P14/3818—
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- H10P34/42—
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- H10W10/0123—
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- H10W10/13—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12528—Semiconductor component
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24777—Edge feature
Landscapes
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56104298A JPS586121A (ja) | 1981-07-02 | 1981-07-02 | 半導体基板 |
| JP56116008A JPS5820794A (ja) | 1981-07-24 | 1981-07-24 | 半導体基板の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3224604A1 DE3224604A1 (de) | 1983-01-20 |
| DE3224604C2 true DE3224604C2 (enExample) | 1989-06-15 |
Family
ID=26444803
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19823224604 Granted DE3224604A1 (de) | 1981-07-02 | 1982-07-01 | Halbleitersubstrat und verfahren zur herstellung einer monokristallinen schicht |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US4576851A (enExample) |
| DE (1) | DE3224604A1 (enExample) |
| GB (1) | GB2104723B (enExample) |
| NL (1) | NL188550C (enExample) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58164219A (ja) * | 1982-03-25 | 1983-09-29 | Agency Of Ind Science & Technol | 積層型半導体装置の製造方法 |
| US4461670A (en) * | 1982-05-03 | 1984-07-24 | At&T Bell Laboratories | Process for producing silicon devices |
| JPH0671043B2 (ja) * | 1984-08-31 | 1994-09-07 | 株式会社東芝 | シリコン結晶体構造の製造方法 |
| US4719183A (en) * | 1984-10-03 | 1988-01-12 | Sharp Kabushiki Kaisha | Forming single crystal silicon on insulator by irradiating a laser beam having dual peak energy distribution onto polysilicon on a dielectric substrate having steps |
| US4656101A (en) * | 1984-11-07 | 1987-04-07 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device with a protective film |
| US4654958A (en) * | 1985-02-11 | 1987-04-07 | Intel Corporation | Process for forming isolated silicon regions and field-effect devices on a silicon substrate |
| US5753542A (en) * | 1985-08-02 | 1998-05-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for crystallizing semiconductor material without exposing it to air |
| JPS6476760A (en) * | 1987-09-18 | 1989-03-22 | Toshiba Corp | Manufacture of semiconductor device |
| JP2660064B2 (ja) * | 1988-10-02 | 1997-10-08 | キヤノン株式会社 | 結晶物品及びその形成方法 |
| JP2597703B2 (ja) * | 1989-02-27 | 1997-04-09 | 三菱電機株式会社 | 半導体装置の製造方法 |
| EP0391081A3 (en) * | 1989-04-06 | 1991-08-07 | International Business Machines Corporation | Fabrication and structure of semiconductor-on-insulator islands |
| US5368880A (en) * | 1989-12-06 | 1994-11-29 | Westinghouse Electric Corporation | Eutectic bond and method of gold/titanium eutectic bonding of cadmium telluride to sapphire |
| US5578520A (en) | 1991-05-28 | 1996-11-26 | Semiconductor Energy Laboratory Co., Ltd. | Method for annealing a semiconductor |
| JPH05182923A (ja) * | 1991-05-28 | 1993-07-23 | Semiconductor Energy Lab Co Ltd | レーザーアニール方法 |
| US5766344A (en) * | 1991-09-21 | 1998-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming a semiconductor |
| US5373803A (en) * | 1991-10-04 | 1994-12-20 | Sony Corporation | Method of epitaxial growth of semiconductor |
| JP2908150B2 (ja) * | 1992-11-27 | 1999-06-21 | 日本電気株式会社 | Soi基板構造及びその製造方法 |
| US7097712B1 (en) | 1992-12-04 | 2006-08-29 | Semiconductor Energy Laboratory Co., Ltd. | Apparatus for processing a semiconductor |
| JP3165304B2 (ja) * | 1992-12-04 | 2001-05-14 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法及び半導体処理装置 |
| CN1052566C (zh) | 1993-11-05 | 2000-05-17 | 株式会社半导体能源研究所 | 制造半导体器件的方法 |
| US6897100B2 (en) | 1993-11-05 | 2005-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Method for processing semiconductor device apparatus for processing a semiconductor and apparatus for processing semiconductor device |
| KR100294196B1 (ko) * | 1994-06-02 | 2002-10-18 | 삼성에스디아이 주식회사 | 평활막을구비한액정표시소자및그형성방법 |
| JPH11204452A (ja) * | 1998-01-13 | 1999-07-30 | Mitsubishi Electric Corp | 半導体基板の処理方法および半導体基板 |
| JP5025057B2 (ja) | 2001-05-10 | 2012-09-12 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| WO2012050964A1 (en) * | 2010-09-29 | 2012-04-19 | The Trustees Of Columbia University In The City Of New York | Systems and methods using a glassy carbon heater |
| US9466520B2 (en) * | 2014-04-13 | 2016-10-11 | Texas Instruments Incorporated | Localized region of isolated silicon over recessed dielectric layer |
| US9437811B2 (en) * | 2014-12-05 | 2016-09-06 | Shanghai Ciyu Information Technologies Co., Ltd. | Method for making a magnetic random access memory element with small dimension and high quality |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3336159A (en) * | 1963-10-07 | 1967-08-15 | Ncr Co | Method for growing single thin film crystals |
| US3375418A (en) * | 1964-09-15 | 1968-03-26 | Sprague Electric Co | S-m-s device with partial semiconducting layers |
| CH455055A (de) * | 1967-03-15 | 1968-04-30 | Ibm | Halbleiteranordnung, bestehend aus einem Substrat, einer Öffnungen enthaltenden Maske und einer durch die Öffnungen mit dem Substrat verbundenen einkristallinen Halbleiterschicht |
| US3649386A (en) * | 1968-04-23 | 1972-03-14 | Bell Telephone Labor Inc | Method of fabricating semiconductor devices |
| US3789276A (en) * | 1968-07-15 | 1974-01-29 | Texas Instruments Inc | Multilayer microelectronic circuitry techniques |
| US3743552A (en) * | 1970-01-30 | 1973-07-03 | North American Rockwell | Process for coplanar semiconductor structure |
| US3740280A (en) * | 1971-05-14 | 1973-06-19 | Rca Corp | Method of making semiconductor device |
| US3929529A (en) * | 1974-12-09 | 1975-12-30 | Ibm | Method for gettering contaminants in monocrystalline silicon |
| DE2848333C2 (de) * | 1978-11-08 | 1984-12-20 | Philips Patentverwaltung Gmbh, 2000 Hamburg | Verfahren zum Herstellen eines Halbleiterbauelements |
| US4252581A (en) * | 1979-10-01 | 1981-02-24 | International Business Machines Corporation | Selective epitaxy method for making filamentary pedestal transistor |
| US4269631A (en) * | 1980-01-14 | 1981-05-26 | International Business Machines Corporation | Selective epitaxy method using laser annealing for making filamentary transistors |
| DE3177317T2 (de) * | 1980-04-10 | 1999-02-25 | Massachusetts Institute Of Technology, Cambridge, Mass. | Verfahren zur Herstellung von Blättern aus kristallinem Material |
| US4378627A (en) * | 1980-07-08 | 1983-04-05 | International Business Machines Corporation | Self-aligned metal process for field effect transistor integrated circuits using polycrystalline silicon gate electrodes |
| US4487639A (en) * | 1980-09-26 | 1984-12-11 | Texas Instruments Incorporated | Localized epitaxy for VLSI devices |
| US4462847A (en) * | 1982-06-21 | 1984-07-31 | Texas Instruments Incorporated | Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition |
-
1982
- 1982-06-22 NL NLAANVRAGE8202526,A patent/NL188550C/xx not_active IP Right Cessation
- 1982-06-24 GB GB08218306A patent/GB2104723B/en not_active Expired
- 1982-07-01 DE DE19823224604 patent/DE3224604A1/de active Granted
-
1985
- 1985-04-16 US US06/723,708 patent/US4576851A/en not_active Expired - Lifetime
-
1988
- 1988-03-17 US US07/171,370 patent/USRE33096E/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| NL188550B (nl) | 1992-02-17 |
| GB2104723A (en) | 1983-03-09 |
| NL8202526A (nl) | 1983-02-01 |
| USRE33096E (en) | 1989-10-17 |
| GB2104723B (en) | 1985-10-16 |
| NL188550C (nl) | 1992-07-16 |
| US4576851A (en) | 1986-03-18 |
| DE3224604A1 (de) | 1983-01-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8110 | Request for examination paragraph 44 | ||
| 8127 | New person/name/address of the applicant |
Owner name: KABUSHIKI KAISHA SUWA SEIKOSHA, SHINJUKU, TOKIO-TO |
|
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8328 | Change in the person/name/address of the agent |
Free format text: HOFFMANN, E., DIPL.-ING., PAT.-ANW., 82166 GRAEFELFING |
|
| 8327 | Change in the person/name/address of the patent owner |
Owner name: SEIKO EPSON CORP., TOKIO/TOKYO, JP |