USRE33096E - Semiconductor substrate - Google Patents

Semiconductor substrate Download PDF

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Publication number
USRE33096E
USRE33096E US07/171,370 US17137088A USRE33096E US RE33096 E USRE33096 E US RE33096E US 17137088 A US17137088 A US 17137088A US RE33096 E USRE33096 E US RE33096E
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semiconductor
film
insulating film
layer
mono
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US07/171,370
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Seiichi Iwamatsu
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Seiko Epson Corp
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Seiko Epson Corp
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Priority to JP56104298A priority patent/JPS586121A/en
Priority to JP56116008A priority patent/JPS6234716B2/ja
Priority to JP56-116008 priority
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2022Epitaxial regrowth of non-monocrystalline semiconductor materials, e.g. lateral epitaxy by seeded solidification, solid-state crystallization, solid-state graphoepitaxy, explosive crystallization, grain growth in polycrystalline materials
    • H01L21/2026Epitaxial regrowth of non-monocrystalline semiconductor materials, e.g. lateral epitaxy by seeded solidification, solid-state crystallization, solid-state graphoepitaxy, explosive crystallization, grain growth in polycrystalline materials using a coherent energy beam, e.g. laser or electron beam
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H01L21/76208Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region using auxiliary pillars in the recessed region, e.g. to form LOCOS over extended areas
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12528Semiconductor component
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24479Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24777Edge feature

Abstract

A semiconductor substrate including a single-crystal mono-crystalline film on an insulating film and methods of fabrication are provided. The insulating film has an opening to expose the single-crystal material to a polycrystalline or amorphous semiconductor layer on the insulating film for growing mono-crystals upon application of heat slightly less than the melting point of the semiconductor and applying an energy beam, such as an electron beam or light beam to the semiconductor film. The semiconductor-insulator-semiconductor provides improved substitutes for Silicon On Sapphire formed by the epitaxial method.

Description

This is a continuation of application Ser. No. 394,070, filed July 1, 1982, now abandoned.
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor substrate, and in particular a mono-crystalline semiconductor plate-insulating film-mono-crystalline semiconductor film wherein the insulating film is formed with an opening and mono-crystalline semiconductor film is formed in the opening and on the insulating film.
There has been recent interest in growing single-crystal silicon films over insulating layers on silicon substrates as a substitute for Silicon On Sapphire substrates which are expensive. Additionally, methods for fabricating such devices can be utilized for fabrication of devices incorporting multiple isolated semiconductor layers. One such technique for preparing this type of substrate appeared in John C. C. Fan, M. W. Geis, and Bor-Yeu Tsaur, Appl. Phys. Lett. 38,(5), 365 (1981), wherein the authors have reported growing single-crystal silicon films over insulating layers on silicon substrates. According to this method, at the opening portion, or window, there is a step gap between the surface of the mono-crystalline semiconductive film on the semiconductive plate and a surface of the mono-crystalline semiconductor film on the insulating film. This same step gap is also formed in the mono-crystalline semiconductor film. Thus, a problem arises in that wiring formed at the window portion is easily damaged due to the step gap.
In these cases the conventional construction is not fully satisfactory in that parasitic capacitance which forms between the semiconductor device and the mono-crystalline semiconductor substrate cannot be reduced due to the necessarily thin insulating film. On the other hand, if the thickness of the insulating film is increased in order to reduce the parasitic capacitance effect, the step gap is larger. Such a large step gap tends to damage wires formed at the step gap.
The conventional manufacturing method of providing a monocrystalline semiconductor layer on an insulator is to provide a silicon semiconductor layer on a mono-crystalline sapphire substrate. This device is generally represented as SOS (Silicon On Sapphire) formed by the epitaxial method. However, in conventional technique, there is no crystal surface wherein the lattice constant of the mono-crystalline sapphire substrate coincides with the lattice constant of the grown silicon mono-crystalline layer. The difference in lattice constant is within at least several percent at best. Thus, substantial crystal defects exist in the silicon mono-crystalline layer. Additionally, as such sapphire substrates are expensive, practical use of such substrates have been restrained. This is the case in spite of the increasing demand for manufacturing high-speed semiconductor devices, utilizes a mono-crystalline semiconductor layer on an insulator.
Accordingly, it would be desirable to provide a semiconductor substrate and a method of preparing the semiconductor substrate which would satisfy these needs and overcome the problems encountered in the prior art.
SUMMARY OF THE INVENTION
Generally speaking, in accordance with the invention, a semiconductor substrate including a semiconductor base or plate having a projecting region and na insulating film having a window opening formed on the semiconductor plate with the projecting semiconductor region in the window opening and a mono-crystalline semiconductor film formed on the insulating film is provided. The semiconductor substrate is characterized in that the surface of the semiconductor material in the window opening is at substantially the same level as the surface of the insulating film. This flat surface of the step gaps of window openings and provides a highly reliable substrate having minimal parasitic capacitance.
Semiconductor substrates in accordance with the invention may be prepared by forming an insulator mask to correspond to the window opening on a mono-crystalline semiconductor plate or base and removing mono-crystalline semiconductor plate material by etching in the unmasked region. An insulator film is deposed on the etched region and the mask removed leaving the surface of the insulator film and the semiconductor material in the window opening substantially the same. A poly-crystalline or amorphous semiconductor material is deposited on the insulating film and energy beams are applied to the surface for forming the mono-crystalline semiconductor film in which crystal growth is seeded by the mono-crystalline semiconductor material at the window opening in the insulating film. In an alternative embodiment of the invention, a window may be etched through an insulating film formed on a mono-crystalline semiconductor plate and semiconductor disposed within the window opening. Semiconductor material is then disposed across the surface of the insulating film and the semiconductor material in the window. Energy beam application causes the mono-crystalline semiconductor film to be seeded by the mono-crystalline semiconductor material of the plate.
In another embodiment of the invention a mono-crystalline layer is formed by providing a first solid layer, a seed for growing mono-crystals which is provided on a portion of the first solid layer and a second solid layer of poly-crystalline or amorphous semiconductor material which is in contact with at least a portion of the seed for growing mono-crystals and it covers the first solid layer, the second solid layer mono-crystalized by elevating the temperature of the first solid layer to slightly less than the melting point of the second solid layer and applying energy beams, such as an electron beam or light beam to the second solid layer and scanning the energy beam from a contact point of the seed with the second solid layer across the second solid layer and repeating the melting and cooling for forming the mono-crystalline layer.
Accordingly, it is an object of the invention to provide an improved semiconductor substrate.
It is another object of this invention to provide an improved semiconductor substrate including a semiconductor film on an insulating film.
Another object of the invention is to provide an improved semiconductor substrate which includes an insulating film having a window opening on a semiconductor plate and semiconductor material in the window opening and across the surface of the insulating film.
It is another object of the invention to provide an improved semiconductor substrate including an insulating film having an opening therethrough formed on a mono-crystalline silicon semiconductor plate with a mono-crystalline semiconductor film formed in the window opening and on the surface of the insulating film.
Still a further object of the invention is to provide a method for preparing a semiconductor substrate which includes an insulating film having a window opening on a semiconductor plate and a semiconductor material in the window opening and across the surface of the insulating film.
Yet another object of the invention is to provide a method for forming the semiconductor substrate by etching the semiconductor plate in the region other than the window opening in the insulating film.
It is another object of the invention to provide an improved method of preparing the semiconductor substrate wherein the window opening is formed in the insulating film by etching.
Yet a further object of the invention is to provide a method for forming the semiconductor substrate by providing a seed for growing mono-crystals in contact with a solid layer which is mono-crystalized by raising the temperature and applying an energy beam to the layer to be mono-crystalized.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
The invention accordingly comprises the several steps and the relation of one or more of such steps with respect to each of the others, and the article possessing the features, properties, and the relation of elements, which are exemplified in the following detailed disclosures, and the scope of the invention will be indicated in the claims.
BRIEF DESCRIPTION OF THE DRAWINGS
For a fuller understanding of the invention, reference is had to the following description taken in connection with the accompanying drawings, in which:
FIGS. 1(a)-(e) are sectional views illustrating steps in a manufacturing process for preparing semiconductor devices in accordance with the invention;
FIGS. 2(a)-(d) are sectional views illustrating the steps in a manufacturing process for preparing semiconductor devices in accordance with another embodiment of the invention;
FIG. 3 is a prespective view of a mono-crystalline layer prepared in accordance with one of the embodiments of the invention; and
FIG. 4 is a sectional view of the structure of a semiconductor substrate as illustrated in FIG. 3.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIGS. 1(a)-(e) illustrate the steps in manufacturing a semiconductor substrate in accordance with the invention. Each figure is a sectional view of the semiconductor in a particular step i the process.
FIG. 1(a) illustrates a mono-crystalline semiconductor base or plate 1, such as silicon for example, and an SiO2 film 2 of about 0.5μ thickness formed on the surface thereof. An additional insulator film 3 of Si3 N4 is formed on SiO2 film 2 by chemical vapor deposition (CVD) method. SiO2 film 2 and Si3 N4 film 3, except in a region 9 corresponding to a window-opening which will be explained in more detail below, are removed by photo-etching. Thus, only a portion of SiO2 film 2 and Si3 N4 film 3 remain at region 9 as illustrated in FIG. 1(a).
Mono-crystalline semiconductor plate 1 is etched to a depth of about 1μ throughout by anisotropic etching utilizing a KOH solution. As shown in FIG. 1(b) SiO2 film 2 and Si3 N4 film 3 serve as a mask for forming a groove 4 about mask region 9. An insulatig film 5, such as SiO2 is formed in groove 4 to about the same level as the surface of semiconductor plate 1 by thermal oxidation again utilizing SiO2 film 2 and Si3 N4 film 3 as a mask. SiO2 film 2 and Si3 N4 are then eliminated resulting in the construction as illustrated in FIG. 1(c).
A 0.5μ thick silicon film 6 in a polycrystalline or amorphous state is formed on the surface of plate 1 by, for example, CVD. An energy beam, indicated by arrows 8, such as heat or light is applied to the surface of silicon film 6 in order to heat substrate to a temperature of about 1200° C. at the surface. At this time silicon film 6 melts. Silicon film 6 is cooled to form a mono-crystalline semiconductor layer 7 as shown in FIG. 1(e).
FIGS. 2(a)-(d) illustrate another embodiment of the invention for manufacturing a semiconductor substrate in accordance with the invnetion. Each Figure is a sectional view of a different step of the semiconductor in the manufacturing process.
An insulating film 12, such as silicon dioxide or the like of about 1μ in thickness is formed on a mono-crystalline semiconductor substrate 11, such as silicon, by thermal oxidation. A portion of insulating film 12 is removed by photo-etching to form a window opening 16. A first mono-crystalline semiconductor film 13 is embedded in window opening 16 by the epitaxial method. The surface of embedded mono-crystal semiconductor film 13 is substantially the same level as the surface of insulating film 12.
A 0.5μ thick silicon film 14 in the polycrystalline or amorphous state is formed across the surface of insulating film 12 and embedded mono-crystalline semiconductor film 13 on the substrate 11 by CVD. Energy beams 8, such as heat rays or light rays are applied to the surface of silicon film 14 wherein plate 11 is heated to a surface temperature of about 1200° C. for melting silicon film 14. A mono-crystalline semiconductor film 15 is formed by cooling melted silicon film 14 as illustrated in FIG. 2(d).
In accordance with these embodiments of the invention, a semiconductor substrate including an insulating film having a window plate with semiconductor film formed in the window opening and across the insulating film. Such as construction is advantageous in that parasitic capacitance between the semiconductor plate and the semiconductor device can be reduced due to the thick insulating film when the semiconductor device is formed on the substrate. This permits obtaining a semiconductor device having high speed response characteristics. In addition, the breaking of wiring of the semiconductor device at the conventional step gaps formed at the window opening the regions is avoided as the semiconductor substrate has a flat surface. Accordingly, highly reliable and a high yield rate semiconductor device can be provided in accordance with this embodiment of the invention.
Referring now to FIG. 3, a prepsective view of a semiconductor substrate with a mono-crystalline semiconductor layer is formed in accordance with a further embodiment of the invention is shown. In accordance with this method of forming a mono-crystalline layer, a carbon heater 21 is maintained at a temperature between about 1200° C. and 1300° C. by electrical heating. A sample of a silicon plate 22 is placed on carbon heater 21. Most of the surfce of silicon plate 22 is covered with an insulation layer 23, which is a single layer structure formed of a single layer of SiO2 or Si3 N4. Alternatively, insulation layer 23 may be formed of a two-layer structure including an SiO2 layer and an Si3 N4 layer. A portion of insulation layer 23 is removed etching to expose the surface of lower Si plate 22.
The exposed portion of Si plate 22 is to become a seed portion 24 for growing a single-crystal layer across insulation layer 23. A poly-crystalline silicon layer 25 is formed across the surface of insulation film 23 by the CVD method. Energy beams 26, such as electron rays or laser rays are linearly irradiated across poly-crystalline silicon layer 25 in the X direction to seed portion 24 for growing a mono-crystal 24. Energy beams 26 are then displaced in the Y direction wherein partial melting of poly-crystalline silicon layer 25 occurs at about 1400° C. A portion of melted poly-crystalline silicon 27 becomes a mono-crystalized region as energy beams 26 are no longer irradiated thereon and the cooling process commences in the Y direction. Thus, poly-crystalline silicon layer 25 becomes a mono-crystalline silicon layer across the surface of insulating layer 23.
FIG. 4 illustrates a type of substrate which may be prepared by utilizing the mono-crystalline layer formed on the insulating film in accordance with this embodiment of the invention. A mono-crystalline silicon film 32 which is the seed crystal for growing a mono-crystalline layer is disposed on or in the surface of a substrate plate or insulating base formed of a quartz glass or ceramic material. Mono-crystalline silicon 32 adheres to insulating base 31 by utilizing a coating glass or a CVD poly-crystal silicon layer 33. A SiO2 layer 34 is deposited on poly-crystalline silicon layer 33 by CVD.
In accordance with this embodiment, advantageous results are obtained in that a device without crystal defects results since the mono-crystalline silicon on the insulator becomes a complete mono-crystalline silicon film having the perfect structure for seeding the growth. Additionally, the substrate in accordance with this embodiment of the invention can be prepared at substantially cost savings compared with a sapphire substrate and is suitable for manufacturing high-speed semiconductor devices.
It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in carrying out the above method and in the constructions set forth above without departing from the spirit and scope of the invention, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.
It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.

Claims (9)

What is claimed is:
1. A semiconductor substrate, comprising a single-crystal semiconductor material having a planar surface and an island of the semiconductor material projecting from the surface forming a projecting region at an edge of said semiconductor material and an insulating film having an opening for cooperating with the projecting region to form a smooth surface with the top of the projecting semiconductor material at substantially the same level as the surface of the remainder of the insulating film and a single-crystal semiconductor film across the top of the projecting region and the insulating film.
2. The semiconductor substrate of claim 1, wherein the projecting region is integrally formed from the semiconductor material.
3. The semiconductor substrate of claim 1, further including a base, the projecting region formed on the base and the insulating film formed .[.on.]. .Iadd.over .Iaddend.the base.
4. The semiconductor substrate of claim 3, wherein the base is a single-crystal semiconductor material in contact with the projecting region of a single-crystal semiconductor material.
5. The semiconductor substrate of claim 3, wherein the base is an insulating substrate and the projection region of single-crystal semiconductor material is a seed material.
6. The semiconductor substrate of claims 4 or 5, wherein the projecting semiconductor material is a single-crystal silicon and the insulating film is one of an SiO2 film an Si3 N4 film and a combination of one layer of SiO2 and one layer of Si3 N4.
7. A semiconductor substrate, comprising an insulating plate, a projecting region of single-crystal semiconductor material disposed on the plate at the edge thereof a single-crystal semiconductor film across the surface of the projecting region and the insulating substrate, and an insulating film on the single-crystal semiconductor film.
8. The semiconductor substrate of claim 7, wherein the projecting semiconductor material is a single-crystal silicon and the insulating film is one of an SiO2 film an Si3 N4 film and a combination of one layer of SiO2 and one layer of Si3 N4. .Iadd.
9. A semiconductor substrate, comprising a single-crystal semiconductor material having a planar surface and an island of the semiconductor material projecting from the surface forming a projecting region and an insulating film having an opening for cooperating with the projecting region to form a smooth surface with the top of the projecting semiconductor material at substantially the same level as the surface of the remainder of the insulating film and a single-crystal semiconductor film across the top of the projecting region and the insulating film, the projecting region disposed at an edge of said single-crystal semiconductor film. .Iaddend. .Iadd.10. The semiconductor substrate of claim 9, wherein the projecting region is integrally formed from the semiconductor material. .Iaddend. .Iadd.11. The semiconductor substrate of claim 9, further including a base, the projecting region formed on the base and the insulating film formed over the base. .Iaddend. .Iadd.12. The semiconductor substrate of claim 11, wherein the base is a single-crystal semiconductor material in contact with the projecting region of a single-crystal semiconductor material. .Iaddend. .Iadd.13. The semiconductor substrate of claim 11, wherein the base is an insulating substrate and the projection region of single-crystal semiconductor material is a seed material. .Iaddend. .Iadd.14. The semiconductor substrate of claims 12 or 13, wherein the projecting semiconductor material is a single-crystal silicon and the insulating film is one of an SiO2 film an Si3 N4 film and a combination of one layer of SiO2 and one layer of Si3 N4. .Iaddend. .Iadd.15. A semiconductor substrate, comprising an insulating material a projecting region of single-crystal semiconductor material, a single-crystal semiconductor film across the surface of the projecting region and the insulating material, and an insulating film on the single-crystal semiconductor film, said projecting region disposed at an edge of the single-crystal semiconductor film. .Iaddend. .Iadd.16. The semiconductor substrate of claim 15, wherein the projecting semiconductor material is a single-crystal silicon and the insulating film is one of an SiO2 film an Si3 N4 film and a combination of one layer of SiO2 and one layer of Si3 N4. .Iaddend.
US07/171,370 1981-07-02 1988-03-17 Semiconductor substrate Expired - Lifetime USRE33096E (en)

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Application Number Priority Date Filing Date Title
JP56-104298 1981-07-02
JP56104298A JPS586121A (en) 1981-07-02 1981-07-02 Semiconductor substrate
JP56116008A JPS6234716B2 (en) 1981-07-24 1981-07-24
JP56-116008 1981-07-24

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US06394070 Continuation 1982-07-01
US06/723,708 Reissue US4576851A (en) 1981-07-02 1985-04-16 Semiconductor substrate

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US4576851A (en) 1986-03-18
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DE3224604A1 (en) 1983-01-20

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