DE3138038C2 - Integrierter Halbleiterspeicher - Google Patents
Integrierter HalbleiterspeicherInfo
- Publication number
- DE3138038C2 DE3138038C2 DE3138038A DE3138038A DE3138038C2 DE 3138038 C2 DE3138038 C2 DE 3138038C2 DE 3138038 A DE3138038 A DE 3138038A DE 3138038 A DE3138038 A DE 3138038A DE 3138038 C2 DE3138038 C2 DE 3138038C2
- Authority
- DE
- Germany
- Prior art keywords
- vth
- transistor
- data
- level
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 27
- 230000015654 memory Effects 0.000 claims abstract description 71
- 238000010079 rubber tapping Methods 0.000 claims abstract description 17
- 238000003860 storage Methods 0.000 claims abstract description 13
- 230000008859 change Effects 0.000 claims description 21
- 238000005070 sampling Methods 0.000 claims description 16
- 238000007599 discharging Methods 0.000 claims description 9
- 101150088150 VTH2 gene Proteins 0.000 claims description 6
- 101100102849 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) VTH1 gene Proteins 0.000 claims description 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- 239000003990 capacitor Substances 0.000 description 15
- 238000010586 diagram Methods 0.000 description 15
- 230000003111 delayed effect Effects 0.000 description 13
- 238000000034 method Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 5
- 230000001052 transient effect Effects 0.000 description 5
- 230000001960 triggered effect Effects 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000036962 time dependent Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 101150112468 OR51E2 gene Proteins 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5634—Reference cells
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55133560A JPS5856199B2 (ja) | 1980-09-25 | 1980-09-25 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3138038A1 DE3138038A1 (de) | 1982-04-22 |
DE3138038C2 true DE3138038C2 (de) | 1987-04-02 |
Family
ID=15107652
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3138038A Expired DE3138038C2 (de) | 1980-09-25 | 1981-09-24 | Integrierter Halbleiterspeicher |
Country Status (4)
Country | Link |
---|---|
US (1) | US4503518A (US07714131-20100511-C00038.png) |
JP (1) | JPS5856199B2 (US07714131-20100511-C00038.png) |
DE (1) | DE3138038C2 (US07714131-20100511-C00038.png) |
GB (1) | GB2084828B (US07714131-20100511-C00038.png) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4415992A (en) * | 1981-02-25 | 1983-11-15 | Motorola, Inc. | Memory system having memory cells capable of storing more than two states |
JPS59126315A (ja) * | 1982-12-24 | 1984-07-20 | Fujitsu Ltd | 比較回路 |
US4634893A (en) * | 1983-01-10 | 1987-01-06 | Ncr Corporation | FET driver circuit with mask programmable transition rates |
US4571709A (en) * | 1983-01-31 | 1986-02-18 | Intel Corporation | Timing apparatus for non-volatile MOS RAM |
JPS59151395A (ja) * | 1983-02-08 | 1984-08-29 | Toshiba Corp | 半導体記憶装置 |
EP0136119B1 (en) * | 1983-09-16 | 1988-06-29 | Fujitsu Limited | Plural-bit-per-cell read-only memory |
JPH0828431B2 (ja) * | 1986-04-22 | 1996-03-21 | 日本電気株式会社 | 半導体記憶装置 |
JPS6342100A (ja) * | 1986-08-08 | 1988-02-23 | Fujitsu Ltd | 3値レベルrom |
US5268870A (en) * | 1988-06-08 | 1993-12-07 | Eliyahou Harari | Flash EEPROM system and intelligent programming and erasing methods therefor |
EP0392895B1 (en) * | 1989-04-13 | 1995-12-13 | Sundisk Corporation | Flash EEprom system |
US7190617B1 (en) | 1989-04-13 | 2007-03-13 | Sandisk Corporation | Flash EEprom system |
US7447069B1 (en) | 1989-04-13 | 2008-11-04 | Sandisk Corporation | Flash EEprom system |
US6002614A (en) * | 1991-02-08 | 1999-12-14 | Btg International Inc. | Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell |
US5218569A (en) | 1991-02-08 | 1993-06-08 | Banks Gerald J | Electrically alterable non-volatile memory with n-bits per memory cell |
JP3397427B2 (ja) * | 1994-02-02 | 2003-04-14 | 株式会社東芝 | 半導体記憶装置 |
US6353554B1 (en) | 1995-02-27 | 2002-03-05 | Btg International Inc. | Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell |
JPH11283386A (ja) * | 1998-03-31 | 1999-10-15 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
FR2836751A1 (fr) * | 2002-02-11 | 2003-09-05 | St Microelectronics Sa | Cellule memoire a programmation unique non destructrice |
FR2836752A1 (fr) * | 2002-02-11 | 2003-09-05 | St Microelectronics Sa | Cellule memoire a programmation unique |
FR2836750A1 (fr) * | 2002-02-11 | 2003-09-05 | St Microelectronics Sa | Cellule memoire a programmation unique non destructrice |
US8624636B2 (en) * | 2006-05-22 | 2014-01-07 | Brillouin Energy Corp. | Drive circuit and method for semiconductor devices |
US20070268045A1 (en) * | 2006-05-22 | 2007-11-22 | Profusion Energy, Inc. | Drive Circuit And Method For Semiconductor Devices |
US7929328B2 (en) * | 2009-06-12 | 2011-04-19 | Vanguard International Semiconductor Corporation | Memory and storage device utilizing the same |
JP1643024S (US07714131-20100511-C00038.png) * | 2019-03-15 | 2019-10-07 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4094008A (en) * | 1976-06-18 | 1978-06-06 | Ncr Corporation | Alterable capacitor memory array |
US4134151A (en) * | 1977-05-02 | 1979-01-09 | Electronic Memories & Magnetics Corporation | Single sense line memory cell |
US4202044A (en) * | 1978-06-13 | 1980-05-06 | International Business Machines Corporation | Quaternary FET read only memory |
US4192014A (en) * | 1978-11-20 | 1980-03-04 | Ncr Corporation | ROM memory cell with 2n FET channel widths |
US4301518A (en) * | 1979-11-01 | 1981-11-17 | Texas Instruments Incorporated | Differential sensing of single ended memory array |
-
1980
- 1980-09-25 JP JP55133560A patent/JPS5856199B2/ja not_active Expired
-
1981
- 1981-09-21 US US06/304,037 patent/US4503518A/en not_active Expired - Lifetime
- 1981-09-22 GB GB8128574A patent/GB2084828B/en not_active Expired
- 1981-09-24 DE DE3138038A patent/DE3138038C2/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5758298A (en) | 1982-04-07 |
GB2084828A (en) | 1982-04-15 |
US4503518A (en) | 1985-03-05 |
GB2084828B (en) | 1984-09-12 |
DE3138038A1 (de) | 1982-04-22 |
JPS5856199B2 (ja) | 1983-12-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8128 | New person/name/address of the agent |
Representative=s name: HENKEL, G., DR.PHIL. FEILER, L., DR.RER.NAT. HAENZ |
|
D2 | Grant after examination | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP |
|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) |