DE3129487C2 - - Google Patents

Info

Publication number
DE3129487C2
DE3129487C2 DE3129487A DE3129487A DE3129487C2 DE 3129487 C2 DE3129487 C2 DE 3129487C2 DE 3129487 A DE3129487 A DE 3129487A DE 3129487 A DE3129487 A DE 3129487A DE 3129487 C2 DE3129487 C2 DE 3129487C2
Authority
DE
Germany
Prior art keywords
layer
silicon layer
silicon
region
vertical transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3129487A
Other languages
German (de)
English (en)
Other versions
DE3129487A1 (de
Inventor
Madhukar B. Los Gatos Calif. Us Vora
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera and Instrument Corp filed Critical Fairchild Camera and Instrument Corp
Publication of DE3129487A1 publication Critical patent/DE3129487A1/de
Application granted granted Critical
Publication of DE3129487C2 publication Critical patent/DE3129487C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10P76/40—
    • H10P95/00—

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
DE19813129487 1980-08-04 1981-07-27 Element der integrierten injektionslogik Granted DE3129487A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10642880A 1980-08-04 1980-08-04

Publications (2)

Publication Number Publication Date
DE3129487A1 DE3129487A1 (de) 1982-06-24
DE3129487C2 true DE3129487C2 (member.php) 1987-06-04

Family

ID=22311366

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813129487 Granted DE3129487A1 (de) 1980-08-04 1981-07-27 Element der integrierten injektionslogik

Country Status (4)

Country Link
JP (1) JPS5753973A (member.php)
DE (1) DE3129487A1 (member.php)
GB (1) GB2081508B (member.php)
NL (1) NL8103031A (member.php)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3476295D1 (en) * 1983-09-19 1989-02-23 Fairchild Semiconductor Method of manufacturing transistor structures having junctions bound by insulating layers, and resulting structures
JPH08213475A (ja) * 1995-02-07 1996-08-20 Mitsubishi Electric Corp 半導体装置とその製造方法
US6352887B1 (en) * 1998-03-26 2002-03-05 Texas Instruments Incorporated Merged bipolar and CMOS circuit and method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4338622A (en) * 1979-06-29 1982-07-06 International Business Machines Corporation Self-aligned semiconductor circuits and process therefor
US4322882A (en) * 1980-02-04 1982-04-06 Fairchild Camera & Instrument Corp. Method for making an integrated injection logic structure including a self-aligned base contact

Also Published As

Publication number Publication date
NL8103031A (nl) 1982-03-01
GB2081508A (en) 1982-02-17
GB2081508B (en) 1985-04-17
JPS5753973A (member.php) 1982-03-31
DE3129487A1 (de) 1982-06-24

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee