DE2803989C2 - Digitaldatenspeicher mit wahlfreiem Zugriff - Google Patents

Digitaldatenspeicher mit wahlfreiem Zugriff

Info

Publication number
DE2803989C2
DE2803989C2 DE2803989A DE2803989A DE2803989C2 DE 2803989 C2 DE2803989 C2 DE 2803989C2 DE 2803989 A DE2803989 A DE 2803989A DE 2803989 A DE2803989 A DE 2803989A DE 2803989 C2 DE2803989 C2 DE 2803989C2
Authority
DE
Germany
Prior art keywords
memory
data
output
digital data
output register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2803989A
Other languages
German (de)
English (en)
Other versions
DE2803989A1 (de
Inventor
Charles Joseph Plano Tex. Fassbender
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of DE2803989A1 publication Critical patent/DE2803989A1/de
Application granted granted Critical
Publication of DE2803989C2 publication Critical patent/DE2803989C2/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/007—Digital input from or digital output to memories of the shift register type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Databases & Information Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Static Random-Access Memory (AREA)
  • Memory System (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
DE2803989A 1977-02-01 1978-01-31 Digitaldatenspeicher mit wahlfreiem Zugriff Expired DE2803989C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/764,603 US4106109A (en) 1977-02-01 1977-02-01 Random access memory system providing high-speed digital data output

Publications (2)

Publication Number Publication Date
DE2803989A1 DE2803989A1 (de) 1978-08-03
DE2803989C2 true DE2803989C2 (de) 1984-04-26

Family

ID=25071207

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2803989A Expired DE2803989C2 (de) 1977-02-01 1978-01-31 Digitaldatenspeicher mit wahlfreiem Zugriff

Country Status (5)

Country Link
US (1) US4106109A (en, 2012)
JP (1) JPS5396737A (en, 2012)
DE (1) DE2803989C2 (en, 2012)
FR (1) FR2379133A1 (en, 2012)
GB (1) GB1580415A (en, 2012)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55150179A (en) * 1979-05-04 1980-11-21 Fujitsu Ltd Semiconductor memory unit
US4330852A (en) * 1979-11-23 1982-05-18 Texas Instruments Incorporated Semiconductor read/write memory array having serial access
US4347587A (en) * 1979-11-23 1982-08-31 Texas Instruments Incorporated Semiconductor integrated circuit memory device with both serial and random access arrays
US4498155A (en) * 1979-11-23 1985-02-05 Texas Instruments Incorporated Semiconductor integrated circuit memory device with both serial and random access arrays
JPS6012718B2 (ja) * 1980-03-28 1985-04-03 富士通株式会社 半導体ダイナミックメモリ
EP0162234A3 (en) * 1980-07-23 1986-03-19 Nec Corporation Memory device
US4412313A (en) * 1981-01-19 1983-10-25 Bell Telephone Laboratories, Incorporated Random access memory system having high-speed serial data paths
JPS57150190A (en) * 1981-02-27 1982-09-16 Hitachi Ltd Monolithic storage device
JPS58128097A (ja) * 1981-12-29 1983-07-30 Fujitsu Ltd 半導体記憶装置
US4546451A (en) * 1982-02-12 1985-10-08 Metheus Corporation Raster graphics display refresh memory architecture offering rapid access speed
US4484308A (en) * 1982-09-23 1984-11-20 Motorola, Inc. Serial data mode circuit for a memory
US4535428A (en) * 1983-03-10 1985-08-13 International Business Machines Corporation Multi-port register implementations
US4558433A (en) * 1983-05-31 1985-12-10 International Business Machines Corporation Multi-port register implementations
US4736287A (en) * 1983-06-20 1988-04-05 Rational Set association memory system
JPH069114B2 (ja) * 1983-06-24 1994-02-02 株式会社東芝 半導体メモリ
JPS6025098A (ja) * 1983-07-20 1985-02-07 Nec Corp メモリ回路
US4646270A (en) * 1983-09-15 1987-02-24 Motorola, Inc. Video graphic dynamic RAM
JPS6072020A (ja) * 1983-09-29 1985-04-24 Nec Corp デュアルポ−トメモリ回路
US4663735A (en) * 1983-12-30 1987-05-05 Texas Instruments Incorporated Random/serial access mode selection circuit for a video memory system
JPS60175293A (ja) * 1984-02-21 1985-09-09 Toshiba Corp 半導体メモリ
US4764901A (en) * 1984-08-03 1988-08-16 Kabushiki Kaisha Toshiba Semiconductor memory device capable of being accessed before completion of data output
GB2165067B (en) * 1984-09-26 1988-10-12 Rational Memory system
JPH0793009B2 (ja) * 1984-12-13 1995-10-09 株式会社東芝 半導体記憶装置
US4685088A (en) * 1985-04-15 1987-08-04 International Business Machines Corporation High performance memory system utilizing pipelining techniques
NL8600848A (nl) * 1986-04-03 1987-11-02 Philips Nv Geheugen met gelijktijdig adresseerbare geheugenelementen.
US4803621A (en) * 1986-07-24 1989-02-07 Sun Microsystems, Inc. Memory access system
US4792951A (en) * 1986-09-11 1988-12-20 Grumman Aerospace Corporation Apparatus and method of stimulating an equipment
US4773071A (en) * 1986-10-02 1988-09-20 Grumman Aerospace Corporation Memory for storing response patterns in an automatic testing instrument
US5274596A (en) * 1987-09-16 1993-12-28 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device having simultaneous operation of adjacent blocks
DE3832328A1 (de) * 1988-09-23 1990-03-29 Broadcast Television Syst Speicheranordnung fuer digitale signale
US5297091A (en) * 1991-10-31 1994-03-22 International Business Machines Corporation Early row address strobe (RAS) precharge
US5303200A (en) * 1992-07-02 1994-04-12 The Boeing Company N-dimensional multi-port memory
JP3476231B2 (ja) * 1993-01-29 2003-12-10 三菱電機エンジニアリング株式会社 同期型半導体記憶装置および半導体記憶装置
US6504550B1 (en) 1998-05-21 2003-01-07 Mitsubishi Electric & Electronics Usa, Inc. System for graphics processing employing semiconductor device
US6661421B1 (en) 1998-05-21 2003-12-09 Mitsubishi Electric & Electronics Usa, Inc. Methods for operation of semiconductor memory
US6559851B1 (en) 1998-05-21 2003-05-06 Mitsubishi Electric & Electronics Usa, Inc. Methods for semiconductor systems for graphics processing
US6535218B1 (en) 1998-05-21 2003-03-18 Mitsubishi Electric & Electronics Usa, Inc. Frame buffer memory for graphic processing
CN112098770B (zh) * 2020-08-20 2024-06-14 深圳市宏旺微电子有限公司 针对动态耦合故障模拟极端环境下的测试方法和装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL226068A (en, 2012) * 1957-03-21
US3641519A (en) * 1958-04-10 1972-02-08 Sylvania Electric Prod Memory system
DE1154157B (de) * 1960-06-22 1963-09-12 Ibm Deutschland Speicherverfahren
US3317902A (en) * 1964-04-06 1967-05-02 Ibm Address selection control apparatus
US3678473A (en) * 1970-06-04 1972-07-18 Shell Oil Co Read-write circuit for capacitive memory arrays
US3740723A (en) * 1970-12-28 1973-06-19 Ibm Integral hierarchical binary storage element
US3691538A (en) * 1971-06-01 1972-09-12 Ncr Co Serial read-out memory system
US3898632A (en) * 1974-07-15 1975-08-05 Sperry Rand Corp Semiconductor block-oriented read/write memory
US3992703A (en) * 1974-10-09 1976-11-16 Rockwell International Corporation Memory output circuit
US4023144A (en) * 1976-04-02 1977-05-10 The United States Of America As Represented By The Secretary Of The Navy Parallel to serial digital converter

Also Published As

Publication number Publication date
JPS5396737A (en) 1978-08-24
GB1580415A (en) 1980-12-03
US4106109A (en) 1978-08-08
JPS618513B2 (en, 2012) 1986-03-14
FR2379133B1 (en, 2012) 1982-11-05
FR2379133A1 (fr) 1978-08-25
DE2803989A1 (de) 1978-08-03

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Legal Events

Date Code Title Description
OD Request for examination
8125 Change of the main classification

Ipc: G11C 8/00

8181 Inventor (new situation)

Free format text: FASSBENDER, CHARLES JOSEPH, PLANO, TEX., US

D2 Grant after examination
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: SAMSUNG ELECTRONICS CO., LTD., SEOUL, KR

8328 Change in the person/name/address of the agent

Free format text: KAHLER, K., DIPL.-ING., 8948 MINDELHEIM KAECK, J., DIPL.-ING. DIPL.-WIRTSCH.-ING., PAT.-ANWAELTE, 8910 LANDSBERG