DE2753607C2 - - Google Patents
Info
- Publication number
- DE2753607C2 DE2753607C2 DE19772753607 DE2753607A DE2753607C2 DE 2753607 C2 DE2753607 C2 DE 2753607C2 DE 19772753607 DE19772753607 DE 19772753607 DE 2753607 A DE2753607 A DE 2753607A DE 2753607 C2 DE2753607 C2 DE 2753607C2
- Authority
- DE
- Germany
- Prior art keywords
- transistor
- circuit
- conductor
- control signal
- addressing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004020 conductor Substances 0.000 claims description 75
- 230000004913 activation Effects 0.000 claims description 20
- 239000000758 substrate Substances 0.000 claims description 10
- 230000001419 dependent effect Effects 0.000 claims description 4
- 230000006870 function Effects 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 230000003797 telogen phase Effects 0.000 claims 1
- 239000000872 buffer Substances 0.000 description 10
- 239000011159 matrix material Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910021339 platinum silicide Inorganic materials 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US74636276A | 1976-12-01 | 1976-12-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE2753607A1 DE2753607A1 (de) | 1978-06-08 |
| DE2753607C2 true DE2753607C2 (enrdf_load_stackoverflow) | 1990-05-17 |
Family
ID=25000519
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19772753607 Granted DE2753607A1 (de) | 1976-12-01 | 1977-12-01 | Monolithischer integrierter bipolarer speicher |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS5831679B2 (enrdf_load_stackoverflow) |
| DE (1) | DE2753607A1 (enrdf_load_stackoverflow) |
| FR (1) | FR2373124A1 (enrdf_load_stackoverflow) |
| GB (1) | GB1547730A (enrdf_load_stackoverflow) |
| IT (1) | IT1090712B (enrdf_load_stackoverflow) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55142475A (en) * | 1979-04-23 | 1980-11-07 | Fujitsu Ltd | Decoder circuit |
| JPS5667964A (en) * | 1979-11-08 | 1981-06-08 | Nec Corp | Integrated circuit |
| US4385368A (en) * | 1980-11-24 | 1983-05-24 | Raytheon Company | Programmable read only memory |
| JPS5884549A (ja) * | 1981-11-16 | 1983-05-20 | Nec Corp | 無線選択呼出受信機 |
| US4686651A (en) * | 1984-11-15 | 1987-08-11 | Raytheon Company | Power switched read-only memory |
| DE10051164B4 (de) | 2000-10-16 | 2007-10-25 | Infineon Technologies Ag | Verfahren zur Maskierung von DQ-Bits |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3599182A (en) * | 1969-01-15 | 1971-08-10 | Ibm | Means for reducing power consumption in a memory device |
| US3680061A (en) * | 1970-04-30 | 1972-07-25 | Ncr Co | Integrated circuit bipolar random access memory system with low stand-by power consumption |
| US3859637A (en) * | 1973-06-28 | 1975-01-07 | Ibm | On-chip auxiliary latch for down-powering array latch decoders |
| US3867644A (en) * | 1974-01-07 | 1975-02-18 | Signetics Corp | High speed low power schottky integrated logic gate circuit with current boost |
| US3979611A (en) * | 1975-02-06 | 1976-09-07 | Rca Corporation | Transistor switching circuit |
-
1977
- 1977-11-16 GB GB4773777A patent/GB1547730A/en not_active Expired
- 1977-11-30 IT IT5200777A patent/IT1090712B/it active
- 1977-11-30 JP JP52143823A patent/JPS5831679B2/ja not_active Expired
- 1977-12-01 DE DE19772753607 patent/DE2753607A1/de active Granted
- 1977-12-01 FR FR7736231A patent/FR2373124A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| IT1090712B (it) | 1985-06-26 |
| FR2373124B1 (enrdf_load_stackoverflow) | 1984-06-22 |
| JPS5369552A (en) | 1978-06-21 |
| FR2373124A1 (fr) | 1978-06-30 |
| DE2753607A1 (de) | 1978-06-08 |
| JPS5831679B2 (ja) | 1983-07-07 |
| GB1547730A (en) | 1979-06-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8110 | Request for examination paragraph 44 | ||
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |