FR2373124A1 - Memoire a circuit integre monolithique bipolaire - Google Patents

Memoire a circuit integre monolithique bipolaire

Info

Publication number
FR2373124A1
FR2373124A1 FR7736231A FR7736231A FR2373124A1 FR 2373124 A1 FR2373124 A1 FR 2373124A1 FR 7736231 A FR7736231 A FR 7736231A FR 7736231 A FR7736231 A FR 7736231A FR 2373124 A1 FR2373124 A1 FR 2373124A1
Authority
FR
France
Prior art keywords
memory
level
circuit
integrated circuit
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7736231A
Other languages
English (en)
Other versions
FR2373124B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of FR2373124A1 publication Critical patent/FR2373124A1/fr
Application granted granted Critical
Publication of FR2373124B1 publication Critical patent/FR2373124B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

Cette mémoire comporte un circuit d'autorisation d'alimentation de secours comprenant une paire de transistors montés en configuration d'élévation de niveau active pour coupler ou découpler électriquement une section d'adressage de matrice de mémoire faisant partie de ladite mémoire et un conducteur de masse, sélectivement, selon le niveau d'un signal d'autorisation d'alimentation de secours. Le circuit d'autonsation d'alimentation de secours est monté entre la section d'adressage et le conducteur de masse pour réduire l'énergie de secours exigée par la mémoire. L'un des transistors de la paire montée en configuration d'élévation de niveau active est un transistor N-P-N comportant un verrou de niveau à diode de Schottky faisant partie intégrante de la mémoire. L'utilisation d'un tel transistor dans le circuit d'autorisation d'alimentation de secours assure des opérations de commutation rapides de la mémoire.
FR7736231A 1976-12-01 1977-12-01 Memoire a circuit integre monolithique bipolaire Granted FR2373124A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74636276A 1976-12-01 1976-12-01

Publications (2)

Publication Number Publication Date
FR2373124A1 true FR2373124A1 (fr) 1978-06-30
FR2373124B1 FR2373124B1 (fr) 1984-06-22

Family

ID=25000519

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7736231A Granted FR2373124A1 (fr) 1976-12-01 1977-12-01 Memoire a circuit integre monolithique bipolaire

Country Status (5)

Country Link
JP (1) JPS5831679B2 (fr)
DE (1) DE2753607A1 (fr)
FR (1) FR2373124A1 (fr)
GB (1) GB1547730A (fr)
IT (1) IT1090712B (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0018192A1 (fr) * 1979-04-23 1980-10-29 Fujitsu Limited Dispositif de mémoire morte bipolaire programmable comprenant des circuits d'adressage
FR2494887A1 (fr) * 1980-11-24 1982-05-28 Raytheon Co Memoire morte programmable

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667964A (en) * 1979-11-08 1981-06-08 Nec Corp Integrated circuit
JPS5884549A (ja) * 1981-11-16 1983-05-20 Nec Corp 無線選択呼出受信機
US4686651A (en) * 1984-11-15 1987-08-11 Raytheon Company Power switched read-only memory
DE10051164B4 (de) * 2000-10-16 2007-10-25 Infineon Technologies Ag Verfahren zur Maskierung von DQ-Bits

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599182A (en) * 1969-01-15 1971-08-10 Ibm Means for reducing power consumption in a memory device
US3859637A (en) * 1973-06-28 1975-01-07 Ibm On-chip auxiliary latch for down-powering array latch decoders
US3867644A (en) * 1974-01-07 1975-02-18 Signetics Corp High speed low power schottky integrated logic gate circuit with current boost

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3680061A (en) * 1970-04-30 1972-07-25 Ncr Co Integrated circuit bipolar random access memory system with low stand-by power consumption
US3979611A (en) * 1975-02-06 1976-09-07 Rca Corporation Transistor switching circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599182A (en) * 1969-01-15 1971-08-10 Ibm Means for reducing power consumption in a memory device
US3859637A (en) * 1973-06-28 1975-01-07 Ibm On-chip auxiliary latch for down-powering array latch decoders
US3867644A (en) * 1974-01-07 1975-02-18 Signetics Corp High speed low power schottky integrated logic gate circuit with current boost

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0018192A1 (fr) * 1979-04-23 1980-10-29 Fujitsu Limited Dispositif de mémoire morte bipolaire programmable comprenant des circuits d'adressage
FR2494887A1 (fr) * 1980-11-24 1982-05-28 Raytheon Co Memoire morte programmable

Also Published As

Publication number Publication date
GB1547730A (en) 1979-06-27
FR2373124B1 (fr) 1984-06-22
DE2753607A1 (de) 1978-06-08
DE2753607C2 (fr) 1990-05-17
JPS5369552A (en) 1978-06-21
JPS5831679B2 (ja) 1983-07-07
IT1090712B (it) 1985-06-26

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Legal Events

Date Code Title Description
ST Notification of lapse