DE2725504A1 - Datenverarbeitungssystem und informationsausgabe - Google Patents

Datenverarbeitungssystem und informationsausgabe

Info

Publication number
DE2725504A1
DE2725504A1 DE19772725504 DE2725504A DE2725504A1 DE 2725504 A1 DE2725504 A1 DE 2725504A1 DE 19772725504 DE19772725504 DE 19772725504 DE 2725504 A DE2725504 A DE 2725504A DE 2725504 A1 DE2725504 A1 DE 2725504A1
Authority
DE
Germany
Prior art keywords
output
address
data
data processing
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19772725504
Other languages
German (de)
English (en)
Other versions
DE2725504C2 (enrdf_load_stackoverflow
Inventor
David L Anderson
Richard L Bishop
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu IT Holdings Inc
Original Assignee
Amdahl Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amdahl Corp filed Critical Amdahl Corp
Publication of DE2725504A1 publication Critical patent/DE2725504A1/de
Application granted granted Critical
Publication of DE2725504C2 publication Critical patent/DE2725504C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Bus Control (AREA)
  • Logic Circuits (AREA)
  • Storage Device Security (AREA)
DE19772725504 1976-06-07 1977-06-06 Datenverarbeitungssystem und informationsausgabe Granted DE2725504A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69355176A 1976-06-07 1976-06-07

Publications (2)

Publication Number Publication Date
DE2725504A1 true DE2725504A1 (de) 1977-12-22
DE2725504C2 DE2725504C2 (enrdf_load_stackoverflow) 1988-07-14

Family

ID=24785129

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19772725504 Granted DE2725504A1 (de) 1976-06-07 1977-06-06 Datenverarbeitungssystem und informationsausgabe

Country Status (8)

Country Link
JP (1) JPS5325329A (enrdf_load_stackoverflow)
AU (1) AU512387B2 (enrdf_load_stackoverflow)
BE (1) BE855476A (enrdf_load_stackoverflow)
CA (1) CA1097820A (enrdf_load_stackoverflow)
CH (1) CH631018A5 (enrdf_load_stackoverflow)
DE (1) DE2725504A1 (enrdf_load_stackoverflow)
GB (2) GB1584003A (enrdf_load_stackoverflow)
IL (1) IL52263A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5517152A (en) * 1978-07-25 1980-02-06 Fujitsu Ltd Photo mask
JPS56111929A (en) * 1980-02-09 1981-09-04 Nec Corp Large-scale integrated circuit
JPS5831336A (ja) * 1981-08-19 1983-02-24 Konishiroku Photo Ind Co Ltd ホトマスク素材
JPS6086407A (ja) * 1983-10-18 1985-05-16 Agency Of Ind Science & Technol 三次元動態解析装置
JPS6128229U (ja) * 1984-07-25 1986-02-20 ソニー株式会社 スイツチ切換え装置
JPS62132108A (ja) * 1985-12-03 1987-06-15 Kanegafuchi Chem Ind Co Ltd 立体物の形状測定方法及び測定装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3792362A (en) * 1972-10-30 1974-02-12 Amdahl Corp Clock apparatus and data processing system
US3806887A (en) * 1973-01-02 1974-04-23 Fte Automatic Electric Labor I Access circuit for central processors of digital communication system
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US3840861A (en) * 1972-10-30 1974-10-08 Amdahl Corp Data processing system having an instruction pipeline for concurrently processing a plurality of instructions
US3876987A (en) * 1972-04-26 1975-04-08 Robin Edward Dalton Multiprocessor computer systems

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS538469B2 (enrdf_load_stackoverflow) * 1973-04-30 1978-03-29
JPS5646612B2 (enrdf_load_stackoverflow) * 1973-11-02 1981-11-04
JPS518840A (enrdf_load_stackoverflow) * 1974-07-09 1976-01-24 Fujitsu Ltd

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3876987A (en) * 1972-04-26 1975-04-08 Robin Edward Dalton Multiprocessor computer systems
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US3792362A (en) * 1972-10-30 1974-02-12 Amdahl Corp Clock apparatus and data processing system
US3840861A (en) * 1972-10-30 1974-10-08 Amdahl Corp Data processing system having an instruction pipeline for concurrently processing a plurality of instructions
US3806887A (en) * 1973-01-02 1974-04-23 Fte Automatic Electric Labor I Access circuit for central processors of digital communication system

Also Published As

Publication number Publication date
JPS5325329A (en) 1978-03-09
DE2725504C2 (enrdf_load_stackoverflow) 1988-07-14
GB1584003A (en) 1981-02-04
AU512387B2 (en) 1980-10-09
BE855476A (fr) 1977-10-03
IL52263A (en) 1980-11-30
AU2591377A (en) 1978-12-14
JPS5732809B2 (enrdf_load_stackoverflow) 1982-07-13
CA1097820A (en) 1981-03-17
CH631018A5 (en) 1982-07-15
GB1584004A (en) 1981-02-04
IL52263A0 (en) 1977-08-31

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Legal Events

Date Code Title Description
8128 New person/name/address of the agent

Representative=s name: VON FUENER, A., DIPL.-CHEM. DR.RER.NAT. EBBINGHAUS

8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee