CH631018A5 - Data processing installation - Google Patents

Data processing installation Download PDF

Info

Publication number
CH631018A5
CH631018A5 CH701277A CH701277A CH631018A5 CH 631018 A5 CH631018 A5 CH 631018A5 CH 701277 A CH701277 A CH 701277A CH 701277 A CH701277 A CH 701277A CH 631018 A5 CH631018 A5 CH 631018A5
Authority
CH
Switzerland
Prior art keywords
main
exploration
address
output
wiring
Prior art date
Application number
CH701277A
Other languages
English (en)
French (fr)
Inventor
Richard L Bischop
David L Anderson
Original Assignee
Amdahl Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amdahl Corp filed Critical Amdahl Corp
Publication of CH631018A5 publication Critical patent/CH631018A5/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766Error or fault reporting or storing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Bus Control (AREA)
  • Logic Circuits (AREA)
  • Storage Device Security (AREA)
CH701277A 1976-06-07 1977-06-07 Data processing installation CH631018A5 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69355176A 1976-06-07 1976-06-07

Publications (1)

Publication Number Publication Date
CH631018A5 true CH631018A5 (en) 1982-07-15

Family

ID=24785129

Family Applications (1)

Application Number Title Priority Date Filing Date
CH701277A CH631018A5 (en) 1976-06-07 1977-06-07 Data processing installation

Country Status (8)

Country Link
JP (1) JPS5325329A (enrdf_load_stackoverflow)
AU (1) AU512387B2 (enrdf_load_stackoverflow)
BE (1) BE855476A (enrdf_load_stackoverflow)
CA (1) CA1097820A (enrdf_load_stackoverflow)
CH (1) CH631018A5 (enrdf_load_stackoverflow)
DE (1) DE2725504A1 (enrdf_load_stackoverflow)
GB (2) GB1584003A (enrdf_load_stackoverflow)
IL (1) IL52263A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5517152A (en) * 1978-07-25 1980-02-06 Fujitsu Ltd Photo mask
JPS56111929A (en) * 1980-02-09 1981-09-04 Nec Corp Large-scale integrated circuit
JPS5831336A (ja) * 1981-08-19 1983-02-24 Konishiroku Photo Ind Co Ltd ホトマスク素材
JPS6086407A (ja) * 1983-10-18 1985-05-16 Agency Of Ind Science & Technol 三次元動態解析装置
JPS6128229U (ja) * 1984-07-25 1986-02-20 ソニー株式会社 スイツチ切換え装置
JPS62132108A (ja) * 1985-12-03 1987-06-15 Kanegafuchi Chem Ind Co Ltd 立体物の形状測定方法及び測定装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1434186A (en) * 1972-04-26 1976-05-05 Gen Electric Co Ltd Multiprocessor computer systems
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US3840861A (en) * 1972-10-30 1974-10-08 Amdahl Corp Data processing system having an instruction pipeline for concurrently processing a plurality of instructions
US3792362A (en) * 1972-10-30 1974-02-12 Amdahl Corp Clock apparatus and data processing system
US3806887A (en) * 1973-01-02 1974-04-23 Fte Automatic Electric Labor I Access circuit for central processors of digital communication system
JPS538469B2 (enrdf_load_stackoverflow) * 1973-04-30 1978-03-29
JPS5646612B2 (enrdf_load_stackoverflow) * 1973-11-02 1981-11-04
JPS518840A (enrdf_load_stackoverflow) * 1974-07-09 1976-01-24 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS5325329A (en) 1978-03-09
DE2725504C2 (enrdf_load_stackoverflow) 1988-07-14
GB1584003A (en) 1981-02-04
AU512387B2 (en) 1980-10-09
BE855476A (fr) 1977-10-03
IL52263A (en) 1980-11-30
AU2591377A (en) 1978-12-14
JPS5732809B2 (enrdf_load_stackoverflow) 1982-07-13
CA1097820A (en) 1981-03-17
GB1584004A (en) 1981-02-04
DE2725504A1 (de) 1977-12-22
IL52263A0 (en) 1977-08-31

Similar Documents

Publication Publication Date Title
FR2480460A1 (fr) Dispositif pour transferer des informations entre des unites principales d'un systeme de traitement de donnees et un sous-systeme central
BE897586A (fr) Circuit parallele de controle de redondance cyclique
FR2582829A1 (fr) Systeme de gestion de memoire d'ordinateur
CH629319A5 (fr) Installation de traitement de donnees.
FR2667706A1 (fr) Antememoire hierarchique a circuits integres.
FR2539239A1 (fr) Systeme d'ordinateur a taches multiples a gestion de memoire
FR2827684A1 (fr) Controleur de memoire presentant une capacite d'ecriture 1x/mx
EP0076196A1 (fr) Système d'arbitrage des demandes d'accès de plusieurs processeurs à des ressources communes, par l'intermédiaire d'un bus commun
EP0029131A1 (fr) Procédé de commande de l'affectation de ressources dans un système comportant plusieurs processeurs à fonctionnement simultané
FR2487561A1 (fr) Systeme de memoire dynamique
EP0683454B1 (fr) Procédé pour tester le déroulement d'un programme d'instructions
FR2491654A1 (fr) Appareil de commande par microprogramme
FR2513410A1 (fr) Microprocesseur et procede pour imbriquer les acces en memoire de ce microprocesseur
BE897587A (fr) Circuit parallele de controle de redondance cyclique
FR2480459A1 (fr) Systeme de traitement de donnees a un dispositif d'appariement d'adresses de memoire de controle
WO1981000468A1 (fr) Dispositif de partage temporel de l'acces a une memoire principale connectee a un bus unique entre un calculateur central et une pluralite de calculateurs peripheriques
FR2518332A1 (fr) Circuit pour detecter la sequence de generation de signaux
FR2473753A1 (fr) Dispositif pour fournir des groupes de donnees corriges a un circuit de destination
CH631018A5 (en) Data processing installation
EP0166838A1 (fr) Procédé et dispositif pour détecter une configuration de bits particulière dans un train de bits en série
FR2632092A1 (fr) Circuit de conditionnement d'ecriture d'antememoire retarde pour un systeme de microcalculateur a bus double comprenant une unite 80386 et une unite 82385
FR2476952A1 (fr) Generateur de signaux de base et de signaux de test de television et systeme comportant un tel dispositif
EP0018618B1 (fr) Dispositif de synchronisation de multiplex dans un central de commutation temporelle
CA1092225A (fr) Central telephonique et les circuits de commande associes
CA1169951A (fr) Dispositif d'adressage d'un ensemble d'enregistreurs d'un central de commutation

Legal Events

Date Code Title Description
PL Patent ceased
PL Patent ceased