DE2644940A1 - Aetzverfahren zum abflachen eines siliciumsubstrats - Google Patents

Aetzverfahren zum abflachen eines siliciumsubstrats

Info

Publication number
DE2644940A1
DE2644940A1 DE19762644940 DE2644940A DE2644940A1 DE 2644940 A1 DE2644940 A1 DE 2644940A1 DE 19762644940 DE19762644940 DE 19762644940 DE 2644940 A DE2644940 A DE 2644940A DE 2644940 A1 DE2644940 A1 DE 2644940A1
Authority
DE
Germany
Prior art keywords
oxide film
silicon
anisotropic etching
etching
recessed portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19762644940
Other languages
German (de)
English (en)
Inventor
Kaoru Shinno
Masayoshi Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2644940A1 publication Critical patent/DE2644940A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30608Anisotropic liquid etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Element Separation (AREA)
DE19762644940 1975-10-06 1976-10-05 Aetzverfahren zum abflachen eines siliciumsubstrats Ceased DE2644940A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11977075A JPS5244175A (en) 1975-10-06 1975-10-06 Method of flat etching of silicon substrate

Publications (1)

Publication Number Publication Date
DE2644940A1 true DE2644940A1 (de) 1977-04-28

Family

ID=14769758

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19762644940 Ceased DE2644940A1 (de) 1975-10-06 1976-10-05 Aetzverfahren zum abflachen eines siliciumsubstrats

Country Status (3)

Country Link
JP (1) JPS5244175A (enrdf_load_html_response)
DE (1) DE2644940A1 (enrdf_load_html_response)
NL (1) NL7610970A (enrdf_load_html_response)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4187125A (en) * 1976-12-27 1980-02-05 Raytheon Company Method for manufacturing semiconductor structures by anisotropic and isotropic etching
US4278987A (en) * 1977-10-17 1981-07-14 Hitachi, Ltd. Junction isolated IC with thick EPI portion having sides at least 20 degrees from (110) orientations
JPS6272974U (enrdf_load_html_response) * 1985-10-28 1987-05-11

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58148131U (ja) * 1982-03-30 1983-10-05 住金鋼材工業株式会社 ブラケツト式サポ−ト足場

Also Published As

Publication number Publication date
NL7610970A (nl) 1977-04-12
JPS5530294B2 (enrdf_load_html_response) 1980-08-09
JPS5244175A (en) 1977-04-06

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Legal Events

Date Code Title Description
8131 Rejection