DE2429257A1 - Verfahren zur herstellung von halbleitervorrichtungen - Google Patents

Verfahren zur herstellung von halbleitervorrichtungen

Info

Publication number
DE2429257A1
DE2429257A1 DE2429257A DE2429257A DE2429257A1 DE 2429257 A1 DE2429257 A1 DE 2429257A1 DE 2429257 A DE2429257 A DE 2429257A DE 2429257 A DE2429257 A DE 2429257A DE 2429257 A1 DE2429257 A1 DE 2429257A1
Authority
DE
Germany
Prior art keywords
insulating film
film
wiring
connecting layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2429257A
Other languages
German (de)
English (en)
Inventor
Hiroshi Kawamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2429257A1 publication Critical patent/DE2429257A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
DE2429257A 1973-10-12 1974-06-19 Verfahren zur herstellung von halbleitervorrichtungen Pending DE2429257A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP48113934A JPS5746215B2 (enrdf_load_stackoverflow) 1973-10-12 1973-10-12

Publications (1)

Publication Number Publication Date
DE2429257A1 true DE2429257A1 (de) 1975-04-17

Family

ID=14624844

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2429257A Pending DE2429257A1 (de) 1973-10-12 1974-06-19 Verfahren zur herstellung von halbleitervorrichtungen

Country Status (2)

Country Link
JP (1) JPS5746215B2 (enrdf_load_stackoverflow)
DE (1) DE2429257A1 (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61141520U (enrdf_load_stackoverflow) * 1985-02-21 1986-09-01

Also Published As

Publication number Publication date
JPS5746215B2 (enrdf_load_stackoverflow) 1982-10-01
JPS5067087A (enrdf_load_stackoverflow) 1975-06-05

Similar Documents

Publication Publication Date Title
DE2620155C2 (enrdf_load_stackoverflow)
DE2700873C2 (de) Verfahren zur Herstellung von komplementären Isolierschicht-Feldeffekttransistoren
DE3021206C2 (de) Verfahren zur Herstellung von Leiterbahnen auf Halbleiterbauelementen
DE2933849C2 (enrdf_load_stackoverflow)
DE3437512C2 (de) Integrierte Halbleiterschaltung mit Isolationsbereichen und Verfahren zu ihrer Herstellung
DE2153103A1 (de) Integrierte Schaltungsanordnung und Verfahren zur Herstellung derselben
DE3110477A1 (de) Verfahren zur herstellung von cmos-bauelementen
DE2641752B2 (de) Verfahren zur Herstellung eines Feldeffekttransistors
DE4221039C2 (de) Verfahren zur Herstellung einer Halbleitervorrichtung mit einem vertikalen Halbleiterelement und einem weiteren Halbleiterbauelement
DE10349185A1 (de) Halbleiterbaugruppe
DE2236279A1 (de) Verfahren zur herstellung von oberflaechen-feldeffekttransistoren, vorzugsweise komplementaeren oberflaechen-feldeffekttransistoren
EP0005185A1 (de) Verfahren zum gleichzeitigen Herstellen von Schottky-Sperrschichtdioden und ohmschen Kontakten nach dotierten Halbleiterzonen
DE19653219A1 (de) Halbleiterbauelement und Herstellungsverfahren dafür
DE2420239A1 (de) Verfahren zur herstellung doppelt diffundierter lateraler transistoren
DE1614457A1 (de) Halbleitervorrichtung und Verfahren zu seiner Herstellung
DE2235185A1 (de) Monolithische integrierte schaltung
DE2265257A1 (de) Verfahren zum herstellen von inselartigen einkristallbereichen fuer integrierte halbleiterschaltungen
DE4240205C2 (de) Verfahren zum Herstellen einer Halbleitervorrichtung, insb. eines Bipolartransistors
DE2348199A1 (de) Verfahren zur herstellung von mis-anordnungen
DE2510593B2 (de) Integrierte Halbleiter-Schaltungsanordnung
DE69032074T2 (de) Verfahren zur Herstellung eines Halbleiterbauteils
DE2923969C2 (de) Verfahren zum Herstellen eines Feldeffekttransistors mit isoliertem Gate für integrierte Halbleiterschaltungen
DE3688757T2 (de) Verfahren zur Herstellung von Halbleiteranordnungen mit Isolationszonen.
DE3002741A1 (de) Verfahren zur herstellung einer halbleitervorrichtung
DE2616857A1 (de) Verfahren zur herstellung von halbleiterbauelementen

Legal Events

Date Code Title Description
OHJ Non-payment of the annual fee