DE2261337B2 - Verfahren zum erzeugen eines metallisierungsmusters auf der oberflaeche eines halbleiterkoerpers - Google Patents

Verfahren zum erzeugen eines metallisierungsmusters auf der oberflaeche eines halbleiterkoerpers

Info

Publication number
DE2261337B2
DE2261337B2 DE19722261337 DE2261337A DE2261337B2 DE 2261337 B2 DE2261337 B2 DE 2261337B2 DE 19722261337 DE19722261337 DE 19722261337 DE 2261337 A DE2261337 A DE 2261337A DE 2261337 B2 DE2261337 B2 DE 2261337B2
Authority
DE
Germany
Prior art keywords
layer
metallization pattern
nickel
photoresist
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19722261337
Other languages
German (de)
English (en)
Other versions
DE2261337A1 (de
Inventor
George Kenneth Reading Labuda Edward Franklin Allentown Pa Herb (VStA)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of DE2261337A1 publication Critical patent/DE2261337A1/de
Publication of DE2261337B2 publication Critical patent/DE2261337B2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/945Special, e.g. metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
DE19722261337 1971-12-20 1972-12-15 Verfahren zum erzeugen eines metallisierungsmusters auf der oberflaeche eines halbleiterkoerpers Withdrawn DE2261337B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00209560A US3808108A (en) 1971-12-20 1971-12-20 Semiconductor device fabrication using nickel to mask cathodic etching

Publications (2)

Publication Number Publication Date
DE2261337A1 DE2261337A1 (de) 1973-07-26
DE2261337B2 true DE2261337B2 (de) 1977-09-15

Family

ID=22779246

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19722261337 Withdrawn DE2261337B2 (de) 1971-12-20 1972-12-15 Verfahren zum erzeugen eines metallisierungsmusters auf der oberflaeche eines halbleiterkoerpers

Country Status (10)

Country Link
US (1) US3808108A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5117871B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
BE (1) BE792908A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CA (1) CA956039A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CH (1) CH544409A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE2261337B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2164684B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
IT (1) IT976112B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
NL (1) NL155984B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
SE (1) SE381536B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2328284A1 (fr) * 1975-10-15 1977-05-13 Labo Electronique Physique Diode fonctionnant dans le domaine des ondes millimetriques et son procede de fabrication
JPS52136590A (en) * 1976-05-11 1977-11-15 Matsushita Electric Ind Co Ltd Production of semiconductor device
CA1109927A (en) * 1978-06-26 1981-09-29 Edmund T. Marciniec Manufacture of thin film thermal print head
US4206541A (en) * 1978-06-26 1980-06-10 Extel Corporation Method of manufacturing thin film thermal print heads
US4232440A (en) * 1979-02-27 1980-11-11 Bell Telephone Laboratories, Incorporated Contact structure for light emitting device
US4375390A (en) * 1982-03-15 1983-03-01 Anderson Nathaniel C Thin film techniques for fabricating narrow track ferrite heads
US4514751A (en) * 1982-12-23 1985-04-30 International Business Machines Corporation Compressively stresses titanium metallurgy for contacting passivated semiconductor devices
EP2267784B1 (en) 2001-07-24 2020-04-29 Cree, Inc. INSULATING GATE AlGaN/GaN HEMT
US7692263B2 (en) 2006-11-21 2010-04-06 Cree, Inc. High voltage GaN transistors
US8212290B2 (en) 2007-03-23 2012-07-03 Cree, Inc. High temperature performance capable gallium nitride transistor
US8729156B2 (en) 2009-07-17 2014-05-20 Arkema France Polyhydroxyalkanoate composition exhibiting improved impact resistance at low levels of impact modifier
CN105026099A (zh) * 2012-11-29 2015-11-04 康宁股份有限公司 用于块状金属玻璃的接合方法
TWI733069B (zh) * 2017-12-31 2021-07-11 美商羅門哈斯電子材料有限公司 單體、聚合物及包含其的微影組合物

Also Published As

Publication number Publication date
JPS5117871B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1976-06-05
IT976112B (it) 1974-08-20
CH544409A (de) 1973-11-15
FR2164684A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1973-08-03
FR2164684B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1977-04-08
NL155984B (nl) 1978-02-15
SE381536B (sv) 1975-12-08
JPS4886473A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1973-11-15
US3808108A (en) 1974-04-30
NL7217010A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1973-06-22
DE2261337A1 (de) 1973-07-26
CA956039A (en) 1974-10-08
BE792908A (fr) 1973-04-16

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Legal Events

Date Code Title Description
8230 Patent withdrawn