DE2231203A1 - Schaltungsanordnung fuer logische schaltkreise mit feldeffekttransistoren - Google Patents

Schaltungsanordnung fuer logische schaltkreise mit feldeffekttransistoren

Info

Publication number
DE2231203A1
DE2231203A1 DE2231203A DE2231203A DE2231203A1 DE 2231203 A1 DE2231203 A1 DE 2231203A1 DE 2231203 A DE2231203 A DE 2231203A DE 2231203 A DE2231203 A DE 2231203A DE 2231203 A1 DE2231203 A1 DE 2231203A1
Authority
DE
Germany
Prior art keywords
transistor
working electrode
input
electrode
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2231203A
Other languages
German (de)
English (en)
Inventor
Michael A Waters
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsystems International Ltd
Original Assignee
Microsystems International Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CA116959A external-priority patent/CA918757A/en
Application filed by Microsystems International Ltd filed Critical Microsystems International Ltd
Publication of DE2231203A1 publication Critical patent/DE2231203A1/de
Priority claimed from CA218,493A external-priority patent/CA1057331A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/01855Interface arrangements synchronous, i.e. using clock signals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE2231203A 1971-06-29 1972-06-26 Schaltungsanordnung fuer logische schaltkreise mit feldeffekttransistoren Pending DE2231203A1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CA116959A CA918757A (en) 1972-01-17 1971-06-29 Bipolar to mos interface circuit
US21849472A 1972-01-17 1972-01-17
CA218,493A CA1057331A (en) 1974-02-07 1975-01-23 Aspirated vehicle occupant restraint system

Publications (1)

Publication Number Publication Date
DE2231203A1 true DE2231203A1 (de) 1973-01-25

Family

ID=27161283

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2231203A Pending DE2231203A1 (de) 1971-06-29 1972-06-26 Schaltungsanordnung fuer logische schaltkreise mit feldeffekttransistoren

Country Status (3)

Country Link
DE (1) DE2231203A1 (enExample)
FR (1) FR2144361A5 (enExample)
GB (2) GB1388629A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2543403A1 (de) * 1974-09-30 1976-04-15 Citizen Watch Co Ltd Binaersignalquelle in festkoerperbauweise

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3026040C2 (de) * 1980-07-09 1982-05-27 Siemens AG, 1000 Berlin und 8000 München Schalter mit in Serie geschalteten MOS-FET

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2543403A1 (de) * 1974-09-30 1976-04-15 Citizen Watch Co Ltd Binaersignalquelle in festkoerperbauweise

Also Published As

Publication number Publication date
GB1341334A (en) 1973-12-19
FR2144361A5 (enExample) 1973-02-09
GB1388629A (en) 1975-03-26

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