DE2212168C2 - Monolithisch integrierte Halbleiteranordnung - Google Patents

Monolithisch integrierte Halbleiteranordnung

Info

Publication number
DE2212168C2
DE2212168C2 DE2212168A DE2212168A DE2212168C2 DE 2212168 C2 DE2212168 C2 DE 2212168C2 DE 2212168 A DE2212168 A DE 2212168A DE 2212168 A DE2212168 A DE 2212168A DE 2212168 C2 DE2212168 C2 DE 2212168C2
Authority
DE
Germany
Prior art keywords
layer
transistor
semiconductor
collector
zone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2212168A
Other languages
German (de)
English (en)
Other versions
DE2212168A1 (de
Inventor
Horst H. Dipl.-Ing. Dr. 7032 Sindelfingen Berger
Siegfried K. Dipl.-Ing. Dr. 7000 Stuttgart Wiedmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM Deutschland GmbH
Original Assignee
IBM Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Deutschland GmbH filed Critical IBM Deutschland GmbH
Priority to DE2212168A priority Critical patent/DE2212168C2/de
Priority to FR7305436A priority patent/FR2175752B1/fr
Priority to IT20055/73A priority patent/IT978833B/it
Priority to GB614773A priority patent/GB1401158A/en
Priority to JP48016683A priority patent/JPS5149552B2/ja
Priority to SE7302773A priority patent/SE386541B/xx
Priority to US00337510A priority patent/US3823353A/en
Priority to NL7303411A priority patent/NL7303411A/xx
Publication of DE2212168A1 publication Critical patent/DE2212168A1/de
Application granted granted Critical
Publication of DE2212168C2 publication Critical patent/DE2212168C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7327—Inverse vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H01L27/0237—Integrated injection logic structures [I2L] using vertical injector structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091—Integrated injection logic or merged transistor logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/098—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using thyristors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Memories (AREA)
DE2212168A 1972-03-14 1972-03-14 Monolithisch integrierte Halbleiteranordnung Expired DE2212168C2 (de)

Priority Applications (8)

Application Number Priority Date Filing Date Title
DE2212168A DE2212168C2 (de) 1972-03-14 1972-03-14 Monolithisch integrierte Halbleiteranordnung
FR7305436A FR2175752B1 (US20090163788A1-20090625-C00002.png) 1972-03-14 1973-02-06
IT20055/73A IT978833B (it) 1972-03-14 1973-02-06 Struttura monolitica a circuiti integrati
GB614773A GB1401158A (en) 1972-03-14 1973-02-08 Monolithic semiconductor structure
JP48016683A JPS5149552B2 (US20090163788A1-20090625-C00002.png) 1972-03-14 1973-02-12
SE7302773A SE386541B (sv) 1972-03-14 1973-02-28 Monolitisk integrerad halvledarkrets
US00337510A US3823353A (en) 1972-03-14 1973-03-02 Multilayered vertical transistor having reach-through isolating contacts
NL7303411A NL7303411A (US20090163788A1-20090625-C00002.png) 1972-03-14 1973-03-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2212168A DE2212168C2 (de) 1972-03-14 1972-03-14 Monolithisch integrierte Halbleiteranordnung

Publications (2)

Publication Number Publication Date
DE2212168A1 DE2212168A1 (de) 1973-09-20
DE2212168C2 true DE2212168C2 (de) 1982-10-21

Family

ID=5838801

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2212168A Expired DE2212168C2 (de) 1972-03-14 1972-03-14 Monolithisch integrierte Halbleiteranordnung

Country Status (8)

Country Link
US (1) US3823353A (US20090163788A1-20090625-C00002.png)
JP (1) JPS5149552B2 (US20090163788A1-20090625-C00002.png)
DE (1) DE2212168C2 (US20090163788A1-20090625-C00002.png)
FR (1) FR2175752B1 (US20090163788A1-20090625-C00002.png)
GB (1) GB1401158A (US20090163788A1-20090625-C00002.png)
IT (1) IT978833B (US20090163788A1-20090625-C00002.png)
NL (1) NL7303411A (US20090163788A1-20090625-C00002.png)
SE (1) SE386541B (US20090163788A1-20090625-C00002.png)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7107040A (US20090163788A1-20090625-C00002.png) * 1971-05-22 1972-11-24
DE2262297C2 (de) * 1972-12-20 1985-11-28 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau
US3866066A (en) * 1973-07-16 1975-02-11 Bell Telephone Labor Inc Power supply distribution for integrated circuits
DE2344244C3 (de) * 1973-09-01 1982-11-25 Robert Bosch Gmbh, 7000 Stuttgart Laterale Transistorstruktur
FR2244262B1 (US20090163788A1-20090625-C00002.png) * 1973-09-13 1978-09-29 Radiotechnique Compelec
GB1434961A (en) * 1973-11-08 1976-05-12 Plessey Co Ltd Integrated circuit arrangements
DE2356301C3 (de) * 1973-11-10 1982-03-11 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte, logische Schaltung
GB1507299A (en) * 1974-03-26 1978-04-12 Signetics Corp Integrated semiconductor devices
US3982263A (en) * 1974-05-02 1976-09-21 National Semiconductor Corporation Integrated circuit device comprising vertical channel FET resistor
US4199775A (en) * 1974-09-03 1980-04-22 Bell Telephone Laboratories, Incorporated Integrated circuit and method for fabrication thereof
US3947865A (en) * 1974-10-07 1976-03-30 Signetics Corporation Collector-up semiconductor circuit structure for binary logic
NL7413264A (nl) * 1974-10-09 1976-04-13 Philips Nv Geintegreerde schakeling.
US3982266A (en) * 1974-12-09 1976-09-21 Texas Instruments Incorporated Integrated injection logic having high inverse current gain
JPS5615587B2 (US20090163788A1-20090625-C00002.png) * 1974-12-27 1981-04-10
US4119998A (en) * 1974-12-27 1978-10-10 Tokyo Shibaura Electric Co., Ltd. Integrated injection logic with both grid and internal double-diffused injectors
DE2509530C2 (de) * 1975-03-05 1985-05-23 Ibm Deutschland Gmbh, 7000 Stuttgart Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren
CA1056513A (en) * 1975-06-19 1979-06-12 Benjamin J. Sloan (Jr.) Integrated logic circuit and method of fabrication
GB1558281A (en) * 1975-07-31 1979-12-19 Tokyo Shibaura Electric Co Semiconductor device and logic circuit constituted by the semiconductor device
JPS5229184A (en) * 1975-09-01 1977-03-04 Nippon Telegr & Teleph Corp <Ntt> Transistor circuits device
US4071774A (en) * 1975-12-24 1978-01-31 Tokyo Shibaura Electric Co., Ltd. Integrated injection logic with both fan in and fan out Schottky diodes, serially connected between stages
FR2337432A1 (fr) * 1975-12-29 1977-07-29 Radiotechnique Compelec Perfectionnement a la structure des circuits integres a transistors bipolaires complementaires et procede d'obtention
JPS52101961A (en) * 1976-02-23 1977-08-26 Toshiba Corp Semiconductor device
US4137109A (en) * 1976-04-12 1979-01-30 Texas Instruments Incorporated Selective diffusion and etching method for isolation of integrated logic circuit
GB1580977A (en) * 1976-05-31 1980-12-10 Siemens Ag Schottkytransisitor-logic arrangements
US4160986A (en) * 1976-08-02 1979-07-10 Johnson David M Bipolar transistors having fixed gain characteristics
US4087900A (en) * 1976-10-18 1978-05-09 Bell Telephone Laboratories, Incorporated Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions
US4101349A (en) * 1976-10-29 1978-07-18 Hughes Aircraft Company Integrated injection logic structure fabricated by outdiffusion and epitaxial deposition
US4067038A (en) * 1976-12-22 1978-01-03 Harris Corporation Substrate fed logic and method of fabrication
US4159915A (en) * 1977-10-25 1979-07-03 International Business Machines Corporation Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
US4240846A (en) * 1978-06-27 1980-12-23 Harris Corporation Method of fabricating up diffused substrate FED logic utilizing a two-step epitaxial deposition
JPS552187U (US20090163788A1-20090625-C00002.png) * 1979-05-24 1980-01-09
US4359816A (en) * 1980-07-08 1982-11-23 International Business Machines Corporation Self-aligned metal process for field effect transistor integrated circuits
US4322883A (en) * 1980-07-08 1982-04-06 International Business Machines Corporation Self-aligned metal process for integrated injection logic integrated circuits
FR2501910A1 (fr) * 1981-03-13 1982-09-17 Thomson Csf Structure integree d'operateurs logiques bipolaires et son procede de fabrication
EP0093304B1 (en) * 1982-04-19 1986-01-15 Matsushita Electric Industrial Co., Ltd. Semiconductor ic and method of making the same
GB2137411B (en) * 1983-03-24 1987-01-07 Plessey Co Plc Integrated circuit arrangement
US4573099A (en) * 1984-06-29 1986-02-25 At&T Bell Laboratories CMOS Circuit overvoltage protection
US5539233A (en) * 1993-07-22 1996-07-23 Texas Instruments Incorporated Controlled low collector breakdown voltage vertical transistor for ESD protection circuits
US9680473B1 (en) 2016-02-18 2017-06-13 International Business Machines Corporation Ultra dense vertical transport FET circuits

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1538402A (fr) * 1967-06-30 1968-09-06 Radiotechnique Coprim Rtc Procédé de fabrication de dispositifs semi-conducteurs intégrés
US3648128A (en) * 1968-05-25 1972-03-07 Sony Corp An integrated complementary transistor circuit chip with polycrystalline contact to buried collector regions
DE2021824C3 (de) * 1970-05-05 1980-08-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Halbleiterschaltung

Also Published As

Publication number Publication date
GB1401158A (en) 1975-07-16
NL7303411A (US20090163788A1-20090625-C00002.png) 1973-09-18
JPS494485A (US20090163788A1-20090625-C00002.png) 1974-01-16
FR2175752A1 (US20090163788A1-20090625-C00002.png) 1973-10-26
IT978833B (it) 1974-09-20
US3823353A (en) 1974-07-09
FR2175752B1 (US20090163788A1-20090625-C00002.png) 1984-02-17
DE2212168A1 (de) 1973-09-20
SE386541B (sv) 1976-08-09
JPS5149552B2 (US20090163788A1-20090625-C00002.png) 1976-12-27

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Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8339 Ceased/non-payment of the annual fee