DE2149303A1 - Halbleiter-Speichervorrichtung - Google Patents
Halbleiter-SpeichervorrichtungInfo
- Publication number
- DE2149303A1 DE2149303A1 DE19712149303 DE2149303A DE2149303A1 DE 2149303 A1 DE2149303 A1 DE 2149303A1 DE 19712149303 DE19712149303 DE 19712149303 DE 2149303 A DE2149303 A DE 2149303A DE 2149303 A1 DE2149303 A1 DE 2149303A1
- Authority
- DE
- Germany
- Prior art keywords
- particles
- semiconductor device
- semiconductor
- substrate
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
- H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Non-Volatile Memory (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US7746470A | 1970-10-02 | 1970-10-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE2149303A1 true DE2149303A1 (de) | 1972-04-06 |
Family
ID=22138205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19712149303 Pending DE2149303A1 (de) | 1970-10-02 | 1971-10-02 | Halbleiter-Speichervorrichtung |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS521839B1 (enExample) |
| DE (1) | DE2149303A1 (enExample) |
| FR (1) | FR2112241B1 (enExample) |
| GB (1) | GB1297899A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0844671A1 (en) * | 1993-08-19 | 1998-05-27 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
Families Citing this family (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5508543A (en) * | 1994-04-29 | 1996-04-16 | International Business Machines Corporation | Low voltage memory |
| US5768192A (en) * | 1996-07-23 | 1998-06-16 | Saifun Semiconductors, Ltd. | Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping |
| IL125604A (en) | 1997-07-30 | 2004-03-28 | Saifun Semiconductors Ltd | Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge |
| US6768165B1 (en) | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
| FR2772989B1 (fr) * | 1997-12-19 | 2003-06-06 | Commissariat Energie Atomique | Dispositif de memoire multiniveaux a blocage de coulomb, procede de fabrication et procede de lecture/ecriture/ effacement d'un tel dispositif |
| JP4538693B2 (ja) * | 1998-01-26 | 2010-09-08 | ソニー株式会社 | メモリ素子およびその製造方法 |
| JPH11214640A (ja) | 1998-01-28 | 1999-08-06 | Hitachi Ltd | 半導体記憶素子、半導体記憶装置とその制御方法 |
| US6040605A (en) * | 1998-01-28 | 2000-03-21 | Hitachi, Ltd. | Semiconductor memory device |
| US6348711B1 (en) | 1998-05-20 | 2002-02-19 | Saifun Semiconductors Ltd. | NROM cell with self-aligned programming and erasure areas |
| US6215148B1 (en) | 1998-05-20 | 2001-04-10 | Saifun Semiconductors Ltd. | NROM cell with improved programming, erasing and cycling |
| US6429063B1 (en) | 1999-10-26 | 2002-08-06 | Saifun Semiconductors Ltd. | NROM cell with generally decoupled primary and secondary injection |
| US6928001B2 (en) | 2000-12-07 | 2005-08-09 | Saifun Semiconductors Ltd. | Programming and erasing methods for a non-volatile memory cell |
| US6396741B1 (en) | 2000-05-04 | 2002-05-28 | Saifun Semiconductors Ltd. | Programming of nonvolatile memory cells |
| US6490204B2 (en) | 2000-05-04 | 2002-12-03 | Saifun Semiconductors Ltd. | Programming and erasing methods for a reference cell of an NROM array |
| US6614692B2 (en) | 2001-01-18 | 2003-09-02 | Saifun Semiconductors Ltd. | EEPROM array and method for operation thereof |
| US6584017B2 (en) | 2001-04-05 | 2003-06-24 | Saifun Semiconductors Ltd. | Method for programming a reference cell |
| US7098107B2 (en) | 2001-11-19 | 2006-08-29 | Saifun Semiconductor Ltd. | Protective layer in memory device and method therefor |
| US6583007B1 (en) | 2001-12-20 | 2003-06-24 | Saifun Semiconductors Ltd. | Reducing secondary injection effects |
| US6700818B2 (en) | 2002-01-31 | 2004-03-02 | Saifun Semiconductors Ltd. | Method for operating a memory device |
| US6917544B2 (en) | 2002-07-10 | 2005-07-12 | Saifun Semiconductors Ltd. | Multiple use memory chip |
| US6826107B2 (en) | 2002-08-01 | 2004-11-30 | Saifun Semiconductors Ltd. | High voltage insertion in flash memory cards |
| US7136304B2 (en) | 2002-10-29 | 2006-11-14 | Saifun Semiconductor Ltd | Method, system and circuit for programming a non-volatile memory array |
| US7178004B2 (en) | 2003-01-31 | 2007-02-13 | Yan Polansky | Memory array programming circuit and a method for using the circuit |
| US7142464B2 (en) | 2003-04-29 | 2006-11-28 | Saifun Semiconductors Ltd. | Apparatus and methods for multi-level sensing in a memory array |
| US7123532B2 (en) | 2003-09-16 | 2006-10-17 | Saifun Semiconductors Ltd. | Operating array cells with matched reference cells |
| US7317633B2 (en) | 2004-07-06 | 2008-01-08 | Saifun Semiconductors Ltd | Protection of NROM devices from charge damage |
| US7095655B2 (en) | 2004-08-12 | 2006-08-22 | Saifun Semiconductors Ltd. | Dynamic matching of signal path and reference path for sensing |
| US7638850B2 (en) | 2004-10-14 | 2009-12-29 | Saifun Semiconductors Ltd. | Non-volatile memory structure and method of fabrication |
| EP1686592A3 (en) | 2005-01-19 | 2007-04-25 | Saifun Semiconductors Ltd. | Partial erase verify |
| US8053812B2 (en) | 2005-03-17 | 2011-11-08 | Spansion Israel Ltd | Contact in planar NROM technology |
| JP2007027760A (ja) | 2005-07-18 | 2007-02-01 | Saifun Semiconductors Ltd | 高密度不揮発性メモリアレイ及び製造方法 |
| US7668017B2 (en) | 2005-08-17 | 2010-02-23 | Saifun Semiconductors Ltd. | Method of erasing non-volatile memory cells |
| US7221138B2 (en) | 2005-09-27 | 2007-05-22 | Saifun Semiconductors Ltd | Method and apparatus for measuring charge pump output current |
| US7352627B2 (en) | 2006-01-03 | 2008-04-01 | Saifon Semiconductors Ltd. | Method, system, and circuit for operating a non-volatile memory array |
| US7808818B2 (en) | 2006-01-12 | 2010-10-05 | Saifun Semiconductors Ltd. | Secondary injection for NROM |
| US8253452B2 (en) | 2006-02-21 | 2012-08-28 | Spansion Israel Ltd | Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same |
| US7692961B2 (en) | 2006-02-21 | 2010-04-06 | Saifun Semiconductors Ltd. | Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection |
| US7760554B2 (en) | 2006-02-21 | 2010-07-20 | Saifun Semiconductors Ltd. | NROM non-volatile memory and mode of operation |
| US7638835B2 (en) | 2006-02-28 | 2009-12-29 | Saifun Semiconductors Ltd. | Double density NROM with nitride strips (DDNS) |
| US7701779B2 (en) | 2006-04-27 | 2010-04-20 | Sajfun Semiconductors Ltd. | Method for programming a reference cell |
| US7605579B2 (en) | 2006-09-18 | 2009-10-20 | Saifun Semiconductors Ltd. | Measuring and controlling current consumption and output current of charge pumps |
| FR3129342B1 (fr) | 2021-11-19 | 2023-10-06 | Psa Automobiles Sa | Procédé de sécurisation de l’immobilisation d’un véhicule automobile à la suite d’une commande de freinage du véhicule. |
-
1971
- 1971-05-28 GB GB1297899D patent/GB1297899A/en not_active Expired
- 1971-09-02 FR FR7132348A patent/FR2112241B1/fr not_active Expired
- 1971-09-03 JP JP46067583A patent/JPS521839B1/ja active Pending
- 1971-10-02 DE DE19712149303 patent/DE2149303A1/de active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0844671A1 (en) * | 1993-08-19 | 1998-05-27 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| EP0933820A1 (en) * | 1993-08-19 | 1999-08-04 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US6104056A (en) * | 1993-08-19 | 2000-08-15 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US6291852B1 (en) | 1993-08-19 | 2001-09-18 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| EP1204147A1 (en) * | 1993-08-19 | 2002-05-08 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| EP1204146A1 (en) * | 1993-08-19 | 2002-05-08 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US6555882B2 (en) | 1993-08-19 | 2003-04-29 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US6674117B2 (en) | 1993-08-19 | 2004-01-06 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US6787841B2 (en) | 1993-08-19 | 2004-09-07 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US7061053B2 (en) | 1993-08-19 | 2006-06-13 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
| US7309892B2 (en) | 1993-08-19 | 2007-12-18 | Hitachi, Ltd. | Semiconductor element and semiconductor memory device using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2112241B1 (enExample) | 1974-03-29 |
| GB1297899A (enExample) | 1972-11-29 |
| JPS521839B1 (enExample) | 1977-01-18 |
| FR2112241A1 (enExample) | 1972-06-16 |
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