DE1945899B2 - Halbleitervorrichtung und Verfahren zu ihrer Herstellung - Google Patents

Halbleitervorrichtung und Verfahren zu ihrer Herstellung

Info

Publication number
DE1945899B2
DE1945899B2 DE19691945899 DE1945899A DE1945899B2 DE 1945899 B2 DE1945899 B2 DE 1945899B2 DE 19691945899 DE19691945899 DE 19691945899 DE 1945899 A DE1945899 A DE 1945899A DE 1945899 B2 DE1945899 B2 DE 1945899B2
Authority
DE
Germany
Prior art keywords
semiconductor
main surface
intermediate piece
plate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19691945899
Other languages
German (de)
English (en)
Other versions
DE1945899A1 (de
Inventor
Yuichiro Sakai Kaname Ko daira Homma Makoto Suginami Oya, (Japan)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE1945899A1 publication Critical patent/DE1945899A1/de
Publication of DE1945899B2 publication Critical patent/DE1945899B2/de
Withdrawn legal-status Critical Current

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    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Laminated Bodies (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
DE19691945899 1968-09-11 1969-09-10 Halbleitervorrichtung und Verfahren zu ihrer Herstellung Withdrawn DE1945899B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP43064967A JPS51292B1 (enrdf_load_stackoverflow) 1968-09-11 1968-09-11

Publications (2)

Publication Number Publication Date
DE1945899A1 DE1945899A1 (de) 1970-03-26
DE1945899B2 true DE1945899B2 (de) 1972-04-20

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JP (1) JPS51292B1 (enrdf_load_stackoverflow)
DE (1) DE1945899B2 (enrdf_load_stackoverflow)
FR (1) FR2017780A1 (enrdf_load_stackoverflow)
GB (1) GB1276682A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3521572A1 (de) * 1985-06-15 1986-12-18 Brown, Boveri & Cie Ag, 6800 Mannheim Leistungshalbleitermodul mit keramiksubstrat
GB9218233D0 (en) * 1992-08-27 1992-10-14 Dsk Technology International L Cooling of electronics equipment
US20080128895A1 (en) * 2006-12-05 2008-06-05 Oman Todd P Wafer applied thermal-mechanical interface
CN106171051B (zh) * 2015-03-20 2019-06-04 哈农系统 电动压缩机变频器冷却装置及设有其的变频器组装体
US10403594B2 (en) * 2018-01-22 2019-09-03 Toyota Motor Engineering & Manufacturing North America, Inc. Hybrid bonding materials comprising ball grid arrays and metal inverse opal bonding layers, and power electronics assemblies incorporating the same
DE112019007709B4 (de) * 2019-09-13 2025-08-28 Denso Corporation Halbleitervorrichtung

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FR2017780A1 (enrdf_load_stackoverflow) 1970-05-22
DE1945899A1 (de) 1970-03-26
GB1276682A (en) 1972-06-07
JPS51292B1 (enrdf_load_stackoverflow) 1976-01-07

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E77 Valid patent as to the heymanns-index 1977
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