DE1800212A1 - Verfahren zum Herstellen einer Halbleiteranordnung - Google Patents

Verfahren zum Herstellen einer Halbleiteranordnung

Info

Publication number
DE1800212A1
DE1800212A1 DE19681800212 DE1800212A DE1800212A1 DE 1800212 A1 DE1800212 A1 DE 1800212A1 DE 19681800212 DE19681800212 DE 19681800212 DE 1800212 A DE1800212 A DE 1800212A DE 1800212 A1 DE1800212 A1 DE 1800212A1
Authority
DE
Germany
Prior art keywords
zone
base
alloyed
semiconductor body
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19681800212
Other languages
German (de)
English (en)
Inventor
Fritz Stork
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefunken Patentverwertungs GmbH
Original Assignee
Telefunken Patentverwertungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Patentverwertungs GmbH filed Critical Telefunken Patentverwertungs GmbH
Priority to DE19681800212 priority Critical patent/DE1800212A1/de
Priority to GB1234544D priority patent/GB1234544A/en
Priority to US862776A priority patent/US3629017A/en
Publication of DE1800212A1 publication Critical patent/DE1800212A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/2636Bombardment with radiation with high-energy radiation for heating, e.g. electron beam heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Cold Cathode And The Manufacture (AREA)
DE19681800212 1968-10-01 1968-10-01 Verfahren zum Herstellen einer Halbleiteranordnung Pending DE1800212A1 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE19681800212 DE1800212A1 (de) 1968-10-01 1968-10-01 Verfahren zum Herstellen einer Halbleiteranordnung
GB1234544D GB1234544A (US20020095090A1-20020718-M00002.png) 1968-10-01 1969-10-01
US862776A US3629017A (en) 1968-10-01 1969-10-01 Method of producing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19681800212 DE1800212A1 (de) 1968-10-01 1968-10-01 Verfahren zum Herstellen einer Halbleiteranordnung

Publications (1)

Publication Number Publication Date
DE1800212A1 true DE1800212A1 (de) 1970-05-06

Family

ID=5709157

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19681800212 Pending DE1800212A1 (de) 1968-10-01 1968-10-01 Verfahren zum Herstellen einer Halbleiteranordnung

Country Status (3)

Country Link
US (1) US3629017A (US20020095090A1-20020718-M00002.png)
DE (1) DE1800212A1 (US20020095090A1-20020718-M00002.png)
GB (1) GB1234544A (US20020095090A1-20020718-M00002.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2406304A1 (fr) * 1977-10-11 1979-05-11 Fujitsu Ltd Procede et appareil d'etablissement d'un contact electrique par decharge avec une plaquette semi-conductrice

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895977A (en) * 1973-12-20 1975-07-22 Harris Corp Method of fabricating a bipolar transistor
US4364778A (en) * 1980-05-30 1982-12-21 Bell Telephone Laboratories, Incorporated Formation of multilayer dopant distributions in a semiconductor
US4525733A (en) * 1982-03-03 1985-06-25 Eastman Kodak Company Patterning method for reducing hillock density in thin metal films and a structure produced thereby

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1527116A (fr) * 1967-04-18 1968-05-31 Cit Alcatel Procédé de fabrication des diodes par impulsions électriques

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2406304A1 (fr) * 1977-10-11 1979-05-11 Fujitsu Ltd Procede et appareil d'etablissement d'un contact electrique par decharge avec une plaquette semi-conductrice

Also Published As

Publication number Publication date
US3629017A (en) 1971-12-21
GB1234544A (US20020095090A1-20020718-M00002.png) 1971-06-03

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