DE112022004729T5 - Halbleiterbauteil und verfahren zur herstellung eines halbleiterbauteils - Google Patents

Halbleiterbauteil und verfahren zur herstellung eines halbleiterbauteils Download PDF

Info

Publication number
DE112022004729T5
DE112022004729T5 DE112022004729.1T DE112022004729T DE112022004729T5 DE 112022004729 T5 DE112022004729 T5 DE 112022004729T5 DE 112022004729 T DE112022004729 T DE 112022004729T DE 112022004729 T5 DE112022004729 T5 DE 112022004729T5
Authority
DE
Germany
Prior art keywords
resin
wiring
front side
layer
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022004729.1T
Other languages
German (de)
English (en)
Inventor
Naoyuki Sano
Hiroyuki Shinkai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE112022004729T5 publication Critical patent/DE112022004729T5/de
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/141—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being on at least the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
DE112022004729.1T 2021-10-01 2022-09-27 Halbleiterbauteil und verfahren zur herstellung eines halbleiterbauteils Pending DE112022004729T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021162803 2021-10-01
JP2021-162803 2021-10-01
PCT/JP2022/036006 WO2023054389A1 (ja) 2021-10-01 2022-09-27 半導体装置および半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE112022004729T5 true DE112022004729T5 (de) 2024-07-11

Family

ID=85782765

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022004729.1T Pending DE112022004729T5 (de) 2021-10-01 2022-09-27 Halbleiterbauteil und verfahren zur herstellung eines halbleiterbauteils

Country Status (5)

Country Link
US (1) US20240234233A1 (https=)
JP (1) JPWO2023054389A1 (https=)
CN (1) CN118160086A (https=)
DE (1) DE112022004729T5 (https=)
WO (1) WO2023054389A1 (https=)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3608542B2 (ja) * 2001-10-22 2005-01-12 セイコーエプソン株式会社 半導体装置の製造方法
JP7179526B2 (ja) * 2018-08-10 2022-11-29 ローム株式会社 半導体装置および半導体装置の製造方法
JP2021086848A (ja) * 2019-11-25 2021-06-03 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
US20240234233A1 (en) 2024-07-11
CN118160086A (zh) 2024-06-07
WO2023054389A1 (ja) 2023-04-06
JPWO2023054389A1 (https=) 2023-04-06

Similar Documents

Publication Publication Date Title
DE69526895T2 (de) Verfahren zur Herstellung einer halbleitenden Anordnung und einer Halbleiterscheibe
DE10229182B4 (de) Verfahren zur Herstellung einer gestapelten Chip-Packung
DE10157280B4 (de) Verfahren zum Anschließen von Schaltungseinheiten
DE102011001556B4 (de) Herstellungsverfahren für einen gekapselten Halbleiterchip mit externen Kontaktpads
DE102008035911B4 (de) Verfahren zum Herstellen eines integrierten Schaltungsmoduls
DE112008001657T5 (de) Integriertes Leistungsbauelementgehäuse und Modul mit zweiseitiger Kühlung und Verfahren zur Herstellung
DE102008064373B4 (de) Halbleiteranordnung und Verfahren zur Herstellung einer Halbleiteranordnung
DE102006037538A1 (de) Elektronisches Bauteil bzw. Bauteilstapel und Verfahren zum Herstellen eines Bauteils
DE10238781A1 (de) Halbleitervorrichtung
DE102014116379A1 (de) Verfahren zum elektrischen isolieren gemeinsam benutzter zuleitungen eines leiterrahmenstreifens
DE112006003633T5 (de) Klemmenlose und drahtlose Halbleiterchipbaugruppe und Verfahren zum Herstellen derselben
DE102017218365B4 (de) Die-Kontaktstelle, Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung
DE19526511A1 (de) Halbleitervorrichtung und Verfahren zu deren Herstellung und Montage
DE4234700B4 (de) Gehäuste Halbleiteranordnung
DE102018130965A1 (de) Gehäuse-in-gehäuse struktur für halbleitervorrichtungen und verfahren zur herstellung
DE112022000871T5 (de) Halbleiterbauelement
DE102015122282A1 (de) Elektronisches Bauteil und Verfahren zu dessen Herstellung
DE19749539B4 (de) Halbleiterbaustein mit Leiterrahmen und Justierhilfen
DE102018108924A1 (de) Halbleiter-Package und Verfahren
DE112022004729T5 (de) Halbleiterbauteil und verfahren zur herstellung eines halbleiterbauteils
DE102020130617B4 (de) Halbleiterpackages mit elektrischen Umverteilungsschichten unterschiedlicher Dicken und Verfahren zu deren Herstellung
DE102005036646B4 (de) Halbleiterchip und Herstellungsverfahren
DE112023001637T5 (de) Verfahren zur herstellung eines optischen halbleitergehäuses
DE102013106438A1 (de) Chipgehäuse, Chipanordnungen, eine Leiterplatte und Verfahren zur Herstellung von Chipgehäusen
DE69230162T2 (de) Halbleiteranordnung vom Filmträgertyp und Verfahren zum Herstellen derselben

Legal Events

Date Code Title Description
R012 Request for examination validly filed
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0023310000

Ipc: H10W0074100000