DE112022002069T5 - Substrat für Halbleitervorrichtung - Google Patents

Substrat für Halbleitervorrichtung Download PDF

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Publication number
DE112022002069T5
DE112022002069T5 DE112022002069.5T DE112022002069T DE112022002069T5 DE 112022002069 T5 DE112022002069 T5 DE 112022002069T5 DE 112022002069 T DE112022002069 T DE 112022002069T DE 112022002069 T5 DE112022002069 T5 DE 112022002069T5
Authority
DE
Germany
Prior art keywords
copper plate
semiconductor device
recesses
substrate
der
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022002069.5T
Other languages
German (de)
English (en)
Inventor
Tomoo Takai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
NGK Electronics Devices Inc
Original Assignee
NGK Insulators Ltd
NGK Electronics Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd, NGK Electronics Devices Inc filed Critical NGK Insulators Ltd
Publication of DE112022002069T5 publication Critical patent/DE112022002069T5/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/652—Cross-sectional shapes
    • H10W70/6525—Cross-sectional shapes for securing the interconnections to the substrate, e.g. to prevent peeling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/80—Arrangements for protection of devices protecting against overcurrent or overload, e.g. fuses or shunts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/658—Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
DE112022002069.5T 2021-06-09 2022-03-15 Substrat für Halbleitervorrichtung Pending DE112022002069T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021096735A JP7652631B2 (ja) 2021-06-09 2021-06-09 半導体装置用基板
JP2021-096735 2021-06-09
PCT/JP2022/011601 WO2022259676A1 (ja) 2021-06-09 2022-03-15 半導体装置用基板

Publications (1)

Publication Number Publication Date
DE112022002069T5 true DE112022002069T5 (de) 2024-01-25

Family

ID=84425824

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022002069.5T Pending DE112022002069T5 (de) 2021-06-09 2022-03-15 Substrat für Halbleitervorrichtung

Country Status (4)

Country Link
JP (1) JP7652631B2 (https=)
CN (1) CN117480599A (https=)
DE (1) DE112022002069T5 (https=)
WO (1) WO2022259676A1 (https=)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019167509A1 (ja) 2018-03-01 2019-09-06 富士電機株式会社 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10332695A1 (de) * 2003-07-18 2005-02-03 Robert Bosch Gmbh Anordnung zur Befestigung eines Bauelements
JP5056325B2 (ja) * 2007-10-04 2012-10-24 富士電機株式会社 半導体装置の製造方法および半田ペースト塗布用のメタルマスク

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019167509A1 (ja) 2018-03-01 2019-09-06 富士電機株式会社 半導体装置

Also Published As

Publication number Publication date
JP7652631B2 (ja) 2025-03-27
WO2022259676A1 (ja) 2022-12-15
CN117480599A (zh) 2024-01-30
JP2022188583A (ja) 2022-12-21

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R012 Request for examination validly filed
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0023130000

Ipc: H10W0070680000