DE112018000636B4 - Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung - Google Patents

Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung Download PDF

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Publication number
DE112018000636B4
DE112018000636B4 DE112018000636.0T DE112018000636T DE112018000636B4 DE 112018000636 B4 DE112018000636 B4 DE 112018000636B4 DE 112018000636 T DE112018000636 T DE 112018000636T DE 112018000636 B4 DE112018000636 B4 DE 112018000636B4
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source
drain region
sti
metal gate
gate stack
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German (de)
English (en)
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DE112018000636T5 (de
Inventor
Xin Miao
Kangguo Cheng
Chen Zhang
Wenyu XU
Philip Joseph Oldiges
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International Business Machines Corp
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International Business Machines Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/834Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/025Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/63Vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/021Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0158Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including FinFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
DE112018000636.0T 2017-04-17 2018-04-11 Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung Active DE112018000636B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/488,780 2017-04-17
US15/488,780 US9853028B1 (en) 2017-04-17 2017-04-17 Vertical FET with reduced parasitic capacitance
PCT/IB2018/052539 WO2018193342A1 (en) 2017-04-17 2018-04-11 Vertical fet with reduced parasitic capacitance

Publications (2)

Publication Number Publication Date
DE112018000636T5 DE112018000636T5 (de) 2019-11-14
DE112018000636B4 true DE112018000636B4 (de) 2021-12-09

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DE112018000636.0T Active DE112018000636B4 (de) 2017-04-17 2018-04-11 Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung
DE112018008240.7T Active DE112018008240B4 (de) 2017-04-17 2018-04-11 Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu deren herstellung

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Country Link
US (4) US9853028B1 (https=)
JP (1) JP7062682B2 (https=)
CN (1) CN110520973B (https=)
DE (2) DE112018000636B4 (https=)
GB (1) GB2577185B (https=)
WO (1) WO2018193342A1 (https=)

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US10622260B2 (en) 2018-06-12 2020-04-14 International Business Machines Corporation Vertical transistor with reduced parasitic capacitance
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US10707329B2 (en) 2018-07-06 2020-07-07 International Business Machines Corporation Vertical fin field effect transistor device with reduced gate variation and reduced capacitance
US10930758B2 (en) 2018-08-13 2021-02-23 International Business Machines Corporation Space deposition between source/drain and sacrificial layers
US10600885B2 (en) 2018-08-20 2020-03-24 International Business Machines Corporation Vertical fin field effect transistor devices with self-aligned source and drain junctions
US10937786B2 (en) * 2018-09-18 2021-03-02 Globalfoundries U.S. Inc. Gate cut structures
US11201089B2 (en) 2019-03-01 2021-12-14 International Business Machines Corporation Robust low-k bottom spacer for VFET
US10833081B2 (en) 2019-04-09 2020-11-10 International Business Machines Corporation Forming isolated contacts in a stacked vertical transport field effect transistor (VTFET)
US11205728B2 (en) 2019-05-23 2021-12-21 International Business Machines Corporation Vertical field effect transistor with reduced parasitic capacitance
US11217680B2 (en) * 2019-05-23 2022-01-04 International Business Machines Corporation Vertical field-effect transistor with T-shaped gate
US11152265B2 (en) * 2019-08-01 2021-10-19 International Business Machines Corporation Local isolation of source/drain for reducing parasitic capacitance in vertical field effect transistors
US11201241B2 (en) * 2020-01-07 2021-12-14 International Business Machines Corporation Vertical field effect transistor and method of manufacturing a vertical field effect transistor
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Also Published As

Publication number Publication date
US10074652B1 (en) 2018-09-11
US10283504B2 (en) 2019-05-07
US9853028B1 (en) 2017-12-26
WO2018193342A1 (en) 2018-10-25
GB201915887D0 (en) 2019-12-18
CN110520973A (zh) 2019-11-29
US20190181139A1 (en) 2019-06-13
US20180301451A1 (en) 2018-10-18
JP2020513160A (ja) 2020-04-30
DE112018000636T5 (de) 2019-11-14
CN110520973B (zh) 2023-05-23
US10438949B2 (en) 2019-10-08
GB2577185A (en) 2020-03-18
GB2577185B (en) 2020-11-04
JP7062682B2 (ja) 2022-05-06
DE112018008240B4 (de) 2026-02-19

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