DE112018000636B4 - Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung - Google Patents
Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung Download PDFInfo
- Publication number
- DE112018000636B4 DE112018000636B4 DE112018000636.0T DE112018000636T DE112018000636B4 DE 112018000636 B4 DE112018000636 B4 DE 112018000636B4 DE 112018000636 T DE112018000636 T DE 112018000636T DE 112018000636 B4 DE112018000636 B4 DE 112018000636B4
- Authority
- DE
- Germany
- Prior art keywords
- source
- drain region
- sti
- metal gate
- gate stack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/834—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0158—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including FinFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/488,780 | 2017-04-17 | ||
| US15/488,780 US9853028B1 (en) | 2017-04-17 | 2017-04-17 | Vertical FET with reduced parasitic capacitance |
| PCT/IB2018/052539 WO2018193342A1 (en) | 2017-04-17 | 2018-04-11 | Vertical fet with reduced parasitic capacitance |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE112018000636T5 DE112018000636T5 (de) | 2019-11-14 |
| DE112018000636B4 true DE112018000636B4 (de) | 2021-12-09 |
Family
ID=60674791
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE112018000636.0T Active DE112018000636B4 (de) | 2017-04-17 | 2018-04-11 | Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung |
| DE112018008240.7T Active DE112018008240B4 (de) | 2017-04-17 | 2018-04-11 | Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu deren herstellung |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE112018008240.7T Active DE112018008240B4 (de) | 2017-04-17 | 2018-04-11 | Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu deren herstellung |
Country Status (6)
| Country | Link |
|---|---|
| US (4) | US9853028B1 (https=) |
| JP (1) | JP7062682B2 (https=) |
| CN (1) | CN110520973B (https=) |
| DE (2) | DE112018000636B4 (https=) |
| GB (1) | GB2577185B (https=) |
| WO (1) | WO2018193342A1 (https=) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10211315B2 (en) * | 2017-07-19 | 2019-02-19 | Globalfoundries Inc. | Vertical field-effect transistor having a dielectric spacer between a gate electrode edge and a self-aligned source/drain contact |
| US10176995B1 (en) * | 2017-08-09 | 2019-01-08 | Globalfoundries Inc. | Methods, apparatus and system for gate cut process using a stress material in a finFET device |
| US10395988B1 (en) | 2018-04-10 | 2019-08-27 | International Business Machines Corporation | Vertical FET transistor with reduced source/drain contact resistance |
| US10529713B2 (en) | 2018-06-08 | 2020-01-07 | International Business Machines Corporation | Fin field effect transistor devices with modified spacer and gate dielectric thicknesses |
| US10453934B1 (en) | 2018-06-11 | 2019-10-22 | International Business Machines Corporation | Vertical transport FET devices having air gap top spacer |
| US10622260B2 (en) | 2018-06-12 | 2020-04-14 | International Business Machines Corporation | Vertical transistor with reduced parasitic capacitance |
| US10396151B1 (en) | 2018-06-14 | 2019-08-27 | International Business Machines Corporation | Vertical field effect transistor with reduced gate to source/drain capacitance |
| US10707329B2 (en) | 2018-07-06 | 2020-07-07 | International Business Machines Corporation | Vertical fin field effect transistor device with reduced gate variation and reduced capacitance |
| US10930758B2 (en) | 2018-08-13 | 2021-02-23 | International Business Machines Corporation | Space deposition between source/drain and sacrificial layers |
| US10600885B2 (en) | 2018-08-20 | 2020-03-24 | International Business Machines Corporation | Vertical fin field effect transistor devices with self-aligned source and drain junctions |
| US10937786B2 (en) * | 2018-09-18 | 2021-03-02 | Globalfoundries U.S. Inc. | Gate cut structures |
| US11201089B2 (en) | 2019-03-01 | 2021-12-14 | International Business Machines Corporation | Robust low-k bottom spacer for VFET |
| US10833081B2 (en) | 2019-04-09 | 2020-11-10 | International Business Machines Corporation | Forming isolated contacts in a stacked vertical transport field effect transistor (VTFET) |
| US11205728B2 (en) | 2019-05-23 | 2021-12-21 | International Business Machines Corporation | Vertical field effect transistor with reduced parasitic capacitance |
| US11217680B2 (en) * | 2019-05-23 | 2022-01-04 | International Business Machines Corporation | Vertical field-effect transistor with T-shaped gate |
| US11152265B2 (en) * | 2019-08-01 | 2021-10-19 | International Business Machines Corporation | Local isolation of source/drain for reducing parasitic capacitance in vertical field effect transistors |
| US11201241B2 (en) * | 2020-01-07 | 2021-12-14 | International Business Machines Corporation | Vertical field effect transistor and method of manufacturing a vertical field effect transistor |
| US11217692B2 (en) | 2020-01-09 | 2022-01-04 | International Business Machines Corporation | Vertical field effect transistor with bottom spacer |
| US11271107B2 (en) | 2020-03-24 | 2022-03-08 | International Business Machines Corporation | Reduction of bottom epitaxy parasitics for vertical transport field effect transistors |
| CN113823692B (zh) * | 2020-06-19 | 2023-12-22 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| EP3968387A1 (en) * | 2020-09-15 | 2022-03-16 | Imec VZW | Gate spacer patterning |
| US20230091229A1 (en) * | 2021-09-20 | 2023-03-23 | International Business Machines Corporation | Bottom junction and contact area structures for vertical transport field-effect transistors |
| US12550421B2 (en) | 2022-07-15 | 2026-02-10 | International Business Machines Corporation | VTFET with reduced parasitic capacitance |
| CN119653822B (zh) * | 2025-02-18 | 2025-06-17 | 赛晶亚太半导体科技(浙江)有限公司 | 半导体器件 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160149050A1 (en) | 2014-11-21 | 2016-05-26 | International Business Machines Corporation | Reducing direct source-to-drain tunneling in field effect transistors with low effective mass channels |
| US20170317080A1 (en) | 2016-04-27 | 2017-11-02 | International Business Machines Corporation | Integration of vertical transistors with 3d long channel transistors |
Family Cites Families (37)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5087581A (en) | 1990-10-31 | 1992-02-11 | Texas Instruments Incorporated | Method of forming vertical FET device with low gate to source overlap capacitance |
| US5250450A (en) | 1991-04-08 | 1993-10-05 | Micron Technology, Inc. | Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance |
| US6621112B2 (en) * | 2000-12-06 | 2003-09-16 | Infineon Technologies Ag | DRAM with vertical transistor and trench capacitor memory cells and methods of fabrication |
| US20040070050A1 (en) * | 2002-10-10 | 2004-04-15 | Taiwan Semiconductor Manufacturing Company | Structures of vertical resistors and FETs as controlled by electrical field penetration and a band-gap voltage reference using vertical FETs operating in accumulation through the field penetration effect |
| TWI294670B (en) | 2003-06-17 | 2008-03-11 | Ibm | Ultra scalable high speed heterojunction vertical n-channel misfets and methods thereof |
| TWI251342B (en) * | 2003-07-24 | 2006-03-11 | Samsung Electronics Co Ltd | Vertical double-channel silicon-on-insulator transistor and method of manufacturing the same |
| US6933183B2 (en) * | 2003-12-09 | 2005-08-23 | International Business Machines Corporation | Selfaligned source/drain FinFET process flow |
| US7230286B2 (en) | 2005-05-23 | 2007-06-12 | International Business Machines Corporation | Vertical FET with nanowire channels and a silicided bottom contact |
| CN100490182C (zh) * | 2007-06-19 | 2009-05-20 | 北京大学 | 鳍型沟道双栅多功能场效应晶体管的制备方法 |
| WO2009072192A1 (ja) | 2007-12-05 | 2009-06-11 | Unisantis Electronics (Japan) Ltd. | 半導体装置 |
| JP4316659B2 (ja) | 2008-01-29 | 2009-08-19 | 日本ユニサンティスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US8012817B2 (en) * | 2008-09-26 | 2011-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistor performance improving method with metal gate |
| CN102117828B (zh) * | 2009-12-30 | 2013-02-06 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
| US8362572B2 (en) | 2010-02-09 | 2013-01-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Lower parasitic capacitance FinFET |
| CN102376715B (zh) * | 2010-08-11 | 2014-03-12 | 中国科学院微电子研究所 | 一种无电容型动态随机访问存储器结构及其制备方法 |
| US9281378B2 (en) * | 2012-01-24 | 2016-03-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin recess last process for FinFET fabrication |
| CN102646599B (zh) * | 2012-04-09 | 2014-11-26 | 北京大学 | 一种大规模集成电路中FinFET的制备方法 |
| CN103928327B (zh) * | 2013-01-10 | 2017-07-14 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管及其形成方法 |
| US20140264488A1 (en) * | 2013-03-15 | 2014-09-18 | Globalfoundries Inc. | Methods of forming low defect replacement fins for a finfet semiconductor device and the resulting devices |
| JP5670603B1 (ja) | 2013-04-26 | 2015-02-18 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. | 半導体装置の製造方法及び半導体装置 |
| US9349850B2 (en) * | 2013-07-17 | 2016-05-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Thermally tuning strain in semiconductor devices |
| US8952420B1 (en) * | 2013-07-29 | 2015-02-10 | Stmicroelectronics, Inc. | Method to induce strain in 3-D microfabricated structures |
| US9425296B2 (en) * | 2013-09-09 | 2016-08-23 | Qualcomm Incorporated | Vertical tunnel field effect transistor |
| US10008566B2 (en) | 2013-09-12 | 2018-06-26 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor device with reduced electrical resistance and capacitance |
| US9331204B2 (en) * | 2014-03-13 | 2016-05-03 | Macronix International Co., Ltd. | High voltage field effect transistors and circuits utilizing the same |
| CN105336611A (zh) * | 2014-06-18 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 一种FinFET器件的制作方法 |
| US9881993B2 (en) * | 2014-06-27 | 2018-01-30 | Taiwan Semiconductor Manufacturing Company Limited | Method of forming semiconductor structure with horizontal gate all around structure |
| US9337306B2 (en) | 2014-06-30 | 2016-05-10 | Globalfoundries Inc. | Multi-phase source/drain/gate spacer-epi formation |
| US9245883B1 (en) * | 2014-09-30 | 2016-01-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making a FinFET device |
| KR102264656B1 (ko) * | 2014-10-17 | 2021-06-14 | 삼성전자주식회사 | 게이트 코어들 및 핀 액티브 코어를 포함하는 반도체 소자 및 그 제조 방법 |
| US9287362B1 (en) | 2014-11-21 | 2016-03-15 | International Business Machines Corporation | Vertical field effect transistors with controlled overlap between gate electrode and source/drain contacts |
| US9799776B2 (en) * | 2015-06-15 | 2017-10-24 | Stmicroelectronics, Inc. | Semi-floating gate FET |
| US9312383B1 (en) * | 2015-08-12 | 2016-04-12 | International Business Machines Corporation | Self-aligned contacts for vertical field effect transistors |
| US9368572B1 (en) * | 2015-11-21 | 2016-06-14 | International Business Machines Corporation | Vertical transistor with air-gap spacer |
| US9502407B1 (en) * | 2015-12-16 | 2016-11-22 | International Business Machines Corporation | Integrating a planar field effect transistor (FET) with a vertical FET |
| US9437503B1 (en) | 2015-12-22 | 2016-09-06 | International Business Machines Corporation | Vertical FETs with variable bottom spacer recess |
| US9761694B2 (en) * | 2016-01-27 | 2017-09-12 | International Business Machines Corporation | Vertical FET with selective atomic layer deposition gate |
-
2017
- 2017-04-17 US US15/488,780 patent/US9853028B1/en active Active
- 2017-11-09 US US15/808,124 patent/US10074652B1/en active Active
-
2018
- 2018-04-11 CN CN201880024368.8A patent/CN110520973B/zh active Active
- 2018-04-11 DE DE112018000636.0T patent/DE112018000636B4/de active Active
- 2018-04-11 GB GB1915887.2A patent/GB2577185B/en active Active
- 2018-04-11 JP JP2019554969A patent/JP7062682B2/ja active Active
- 2018-04-11 WO PCT/IB2018/052539 patent/WO2018193342A1/en not_active Ceased
- 2018-04-11 DE DE112018008240.7T patent/DE112018008240B4/de active Active
- 2018-06-11 US US16/005,124 patent/US10283504B2/en active Active
-
2019
- 2019-02-14 US US16/276,133 patent/US10438949B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160149050A1 (en) | 2014-11-21 | 2016-05-26 | International Business Machines Corporation | Reducing direct source-to-drain tunneling in field effect transistors with low effective mass channels |
| US20170317080A1 (en) | 2016-04-27 | 2017-11-02 | International Business Machines Corporation | Integration of vertical transistors with 3d long channel transistors |
Also Published As
| Publication number | Publication date |
|---|---|
| US10074652B1 (en) | 2018-09-11 |
| US10283504B2 (en) | 2019-05-07 |
| US9853028B1 (en) | 2017-12-26 |
| WO2018193342A1 (en) | 2018-10-25 |
| GB201915887D0 (en) | 2019-12-18 |
| CN110520973A (zh) | 2019-11-29 |
| US20190181139A1 (en) | 2019-06-13 |
| US20180301451A1 (en) | 2018-10-18 |
| JP2020513160A (ja) | 2020-04-30 |
| DE112018000636T5 (de) | 2019-11-14 |
| CN110520973B (zh) | 2023-05-23 |
| US10438949B2 (en) | 2019-10-08 |
| GB2577185A (en) | 2020-03-18 |
| GB2577185B (en) | 2020-11-04 |
| JP7062682B2 (ja) | 2022-05-06 |
| DE112018008240B4 (de) | 2026-02-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE112018000636B4 (de) | Vertikaler fet mit verringerter parasitärer kapazität und verfahren zu dessen herstellung | |
| DE102019205650B4 (de) | Struktur für einen Feldeffekttransistor und Verfahren | |
| DE102019126237B4 (de) | Dielektrische finnen mit unterschiedlichen dielektrizitätskonstanten und grössen in unterschiedlichen zonen einer halbleitervorrichtung | |
| DE102018115909B4 (de) | Struktur und Verfahren für Finfet-Vorrichtung mit Kontakt über dielektrischem Gate | |
| DE112018000201B4 (de) | Ansatz für eine Isolierung mit einen unteren Dielektrikum für Vertikaltransport-Finnen-Feldeffekttransistoren | |
| DE102021100353B4 (de) | Dreidimensionale speichervorrichtung und deren herstellungsverfahren | |
| DE102019115937B4 (de) | Verfahren zur herstellung einer halbleitervorrichtung | |
| DE102021109770B4 (de) | Hybrid-halbleitervorrichtung | |
| DE102014019360B4 (de) | Halbleiterstruktur und ihr herstellungsverfahren | |
| DE102020124124B4 (de) | Selbstjustierende rückseitige source-kontakt-struktur und verfahren zu ihrer herstellung | |
| DE102019128703A1 (de) | Halbleitervorrichtung und herstellungsverfahren | |
| DE102019206553A1 (de) | Halbleitervorrichtung mit verbesserter Gate-Source/Drain-Metallisierungsisolation | |
| DE102020124625B4 (de) | Transistoren mit nanostrukturen und herstellungsverfahren | |
| DE112016003961T5 (de) | Herstellung von vertikalen Transistoren und Einheiten | |
| DE112021005857B4 (de) | Umhüllende kontakte mit örtlich begrenztem metallsilicid | |
| DE102019103422A1 (de) | Verwenden von Maskenschichten zum Erleichtern der Herstellung von selbstjustierten Kontakten und Durchkontaktierungen | |
| DE112018004228B4 (de) | Vorgehensweise für eine einheitlichkeit von dielektrischen elementen mit einem hohen k | |
| DE102018108821B4 (de) | Verfahren zur herstellung einer halbleitervorrichtung und halbleitervorrichtung | |
| DE102019124526A1 (de) | Halbleitervorrichtung und verfahren | |
| DE112023004174T5 (de) | SRAM-ZELLE MIT GESTAPELTEN FET MIT UNTEREM pFET | |
| DE102020131140A1 (de) | Gateisolierungsstruktur | |
| DE102019214644B4 (de) | Verfahren zu Herstellung einer Finfet-Struktur mit einem einen dielektrischen Streifen umfassenden Gate zur Reduzierung der effektiven Kapazität | |
| DE102020124477B4 (de) | Dreidimensionale stapelbare ferroelektrische direktzugriffsspeichervorrichtungen undherstellungsverfahren | |
| DE102019206113A1 (de) | Feldeffekttransistoren mit multiplen Gatelängen | |
| DE102018103075B4 (de) | Verfahren zum Herstellen einer Halbleitervorrichtung und eine Halbleitervorrichtung |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R012 | Request for examination validly filed | ||
| R016 | Response to examination communication | ||
| R018 | Grant decision by examination section/examining division | ||
| R130 | Divisional application to |
Ref document number: 112018008240 Country of ref document: DE |
|
| R084 | Declaration of willingness to licence | ||
| R020 | Patent grant now final | ||
| R079 | Amendment of ipc main class |
Free format text: PREVIOUS MAIN CLASS: H01L0021336000 Ipc: H10D0030010000 |