GB2577185B - Vertical FET with reduced parasitic capacitance - Google Patents

Vertical FET with reduced parasitic capacitance Download PDF

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Publication number
GB2577185B
GB2577185B GB1915887.2A GB201915887A GB2577185B GB 2577185 B GB2577185 B GB 2577185B GB 201915887 A GB201915887 A GB 201915887A GB 2577185 B GB2577185 B GB 2577185B
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Prior art keywords
parasitic capacitance
vertical fet
reduced parasitic
fet
reduced
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GB201915887D0 (en
GB2577185A (en
Inventor
Miao Xin
Cheng Kangguo
Zhang Chen
Xu Wenyu
Joseph Oldiges Philip
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International Business Machines Corp
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International Business Machines Corp
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Publication of GB2577185A publication Critical patent/GB2577185A/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/834—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0158—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
GB1915887.2A 2017-04-17 2018-04-11 Vertical FET with reduced parasitic capacitance Active GB2577185B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/488,780 US9853028B1 (en) 2017-04-17 2017-04-17 Vertical FET with reduced parasitic capacitance
PCT/IB2018/052539 WO2018193342A1 (en) 2017-04-17 2018-04-11 Vertical fet with reduced parasitic capacitance

Publications (3)

Publication Number Publication Date
GB201915887D0 GB201915887D0 (en) 2019-12-18
GB2577185A GB2577185A (en) 2020-03-18
GB2577185B true GB2577185B (en) 2020-11-04

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB1915887.2A Active GB2577185B (en) 2017-04-17 2018-04-11 Vertical FET with reduced parasitic capacitance

Country Status (6)

Country Link
US (4) US9853028B1 (https=)
JP (1) JP7062682B2 (https=)
CN (1) CN110520973B (https=)
DE (2) DE112018000636B4 (https=)
GB (1) GB2577185B (https=)
WO (1) WO2018193342A1 (https=)

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US10176995B1 (en) * 2017-08-09 2019-01-08 Globalfoundries Inc. Methods, apparatus and system for gate cut process using a stress material in a finFET device
US10395988B1 (en) 2018-04-10 2019-08-27 International Business Machines Corporation Vertical FET transistor with reduced source/drain contact resistance
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US10622260B2 (en) 2018-06-12 2020-04-14 International Business Machines Corporation Vertical transistor with reduced parasitic capacitance
US10396151B1 (en) 2018-06-14 2019-08-27 International Business Machines Corporation Vertical field effect transistor with reduced gate to source/drain capacitance
US10707329B2 (en) 2018-07-06 2020-07-07 International Business Machines Corporation Vertical fin field effect transistor device with reduced gate variation and reduced capacitance
US10930758B2 (en) 2018-08-13 2021-02-23 International Business Machines Corporation Space deposition between source/drain and sacrificial layers
US10600885B2 (en) 2018-08-20 2020-03-24 International Business Machines Corporation Vertical fin field effect transistor devices with self-aligned source and drain junctions
US10937786B2 (en) * 2018-09-18 2021-03-02 Globalfoundries U.S. Inc. Gate cut structures
US11201089B2 (en) 2019-03-01 2021-12-14 International Business Machines Corporation Robust low-k bottom spacer for VFET
US10833081B2 (en) 2019-04-09 2020-11-10 International Business Machines Corporation Forming isolated contacts in a stacked vertical transport field effect transistor (VTFET)
US11205728B2 (en) 2019-05-23 2021-12-21 International Business Machines Corporation Vertical field effect transistor with reduced parasitic capacitance
US11217680B2 (en) * 2019-05-23 2022-01-04 International Business Machines Corporation Vertical field-effect transistor with T-shaped gate
US11152265B2 (en) * 2019-08-01 2021-10-19 International Business Machines Corporation Local isolation of source/drain for reducing parasitic capacitance in vertical field effect transistors
US11201241B2 (en) * 2020-01-07 2021-12-14 International Business Machines Corporation Vertical field effect transistor and method of manufacturing a vertical field effect transistor
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CN113823692B (zh) * 2020-06-19 2023-12-22 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
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US12550421B2 (en) 2022-07-15 2026-02-10 International Business Machines Corporation VTFET with reduced parasitic capacitance
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Also Published As

Publication number Publication date
US10074652B1 (en) 2018-09-11
US10283504B2 (en) 2019-05-07
DE112018000636B4 (de) 2021-12-09
US9853028B1 (en) 2017-12-26
WO2018193342A1 (en) 2018-10-25
GB201915887D0 (en) 2019-12-18
CN110520973A (zh) 2019-11-29
US20190181139A1 (en) 2019-06-13
US20180301451A1 (en) 2018-10-18
JP2020513160A (ja) 2020-04-30
DE112018000636T5 (de) 2019-11-14
CN110520973B (zh) 2023-05-23
US10438949B2 (en) 2019-10-08
GB2577185A (en) 2020-03-18
JP7062682B2 (ja) 2022-05-06
DE112018008240B4 (de) 2026-02-19

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