DE10345469A1 - Schaltungsanordnung zur Einstellung einer Spannungsversorgung für einen Testbetrieb eines integrierten Speichers - Google Patents
Schaltungsanordnung zur Einstellung einer Spannungsversorgung für einen Testbetrieb eines integrierten Speichers Download PDFInfo
- Publication number
- DE10345469A1 DE10345469A1 DE10345469A DE10345469A DE10345469A1 DE 10345469 A1 DE10345469 A1 DE 10345469A1 DE 10345469 A DE10345469 A DE 10345469A DE 10345469 A DE10345469 A DE 10345469A DE 10345469 A1 DE10345469 A1 DE 10345469A1
- Authority
- DE
- Germany
- Prior art keywords
- voltage
- test operation
- setting
- vnwll
- integrated memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/12005—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising voltage or current generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/1204—Bit line control
Landscapes
- Tests Of Electronic Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10345469A DE10345469A1 (de) | 2003-09-30 | 2003-09-30 | Schaltungsanordnung zur Einstellung einer Spannungsversorgung für einen Testbetrieb eines integrierten Speichers |
US10/947,449 US6950358B2 (en) | 2003-09-30 | 2004-09-23 | Circuit arrangement for setting a voltage supply for a test mode of an integrated memory |
CNB200410085197XA CN100346477C (zh) | 2003-09-30 | 2004-09-30 | 设定集成内存测试模式电压供应的电路装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10345469A DE10345469A1 (de) | 2003-09-30 | 2003-09-30 | Schaltungsanordnung zur Einstellung einer Spannungsversorgung für einen Testbetrieb eines integrierten Speichers |
Publications (1)
Publication Number | Publication Date |
---|---|
DE10345469A1 true DE10345469A1 (de) | 2005-05-12 |
Family
ID=34353220
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10345469A Ceased DE10345469A1 (de) | 2003-09-30 | 2003-09-30 | Schaltungsanordnung zur Einstellung einer Spannungsversorgung für einen Testbetrieb eines integrierten Speichers |
Country Status (3)
Country | Link |
---|---|
US (1) | US6950358B2 (de) |
CN (1) | CN100346477C (de) |
DE (1) | DE10345469A1 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10335618B4 (de) * | 2003-08-04 | 2005-12-08 | Infineon Technologies Ag | Halbleiterspeicher und Verfahren zum Betreiben eines Halbleiterspeichers |
CN100419635C (zh) * | 2005-12-16 | 2008-09-17 | 鸿富锦精密工业(深圳)有限公司 | 内存电压产生电路 |
DE102006019507B4 (de) * | 2006-04-26 | 2008-02-28 | Infineon Technologies Ag | Integrierter Halbleiterspeicher mit Testfunktion und Verfahren zum Testen eines integrierten Halbleiterspeichers |
KR100798804B1 (ko) * | 2006-06-29 | 2008-01-29 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
US7903477B2 (en) * | 2008-02-29 | 2011-03-08 | Mosaid Technologies Incorporated | Pre-charge voltage generation and power saving modes |
US8615690B2 (en) * | 2011-05-05 | 2013-12-24 | Mediatek Inc. | Controller of memory device and method for operating the same |
TWI534819B (zh) * | 2014-07-31 | 2016-05-21 | 常憶科技股份有限公司 | 於靜態電流測試下檢測全域字元線缺陷 |
US12073877B2 (en) * | 2021-08-05 | 2024-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Robust circuit for negative bit line generation in SRAM cells |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6049495A (en) * | 1999-02-03 | 2000-04-11 | International Business Machines Corporation | Auto-programmable current limiter to control current leakage due to bitline to wordline short |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1187677A (zh) * | 1997-01-09 | 1998-07-15 | 三菱电机株式会社 | 动态型半导体存储器及其测试方法 |
KR100302617B1 (ko) * | 1999-09-01 | 2001-11-01 | 김영환 | 번인 테스트 회로 |
JP2002074996A (ja) * | 2000-08-25 | 2002-03-15 | Mitsubishi Electric Corp | 半導体集積回路 |
US6714065B2 (en) * | 2001-10-26 | 2004-03-30 | Renesas Technology Corp. | Semiconductor device including power supply circuit conducting charge pumping operation |
-
2003
- 2003-09-30 DE DE10345469A patent/DE10345469A1/de not_active Ceased
-
2004
- 2004-09-23 US US10/947,449 patent/US6950358B2/en not_active Expired - Fee Related
- 2004-09-30 CN CNB200410085197XA patent/CN100346477C/zh not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6049495A (en) * | 1999-02-03 | 2000-04-11 | International Business Machines Corporation | Auto-programmable current limiter to control current leakage due to bitline to wordline short |
Also Published As
Publication number | Publication date |
---|---|
US6950358B2 (en) | 2005-09-27 |
CN1607666A (zh) | 2005-04-20 |
US20050068817A1 (en) | 2005-03-31 |
CN100346477C (zh) | 2007-10-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8127 | New person/name/address of the applicant |
Owner name: QIMONDA AG, 81739 MUENCHEN, DE |
|
R081 | Change of applicant/patentee |
Owner name: INFINEON TECHNOLOGIES AG, DE Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE Owner name: POLARIS INNOVATIONS LTD., IE Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE |
|
R082 | Change of representative |
Representative=s name: EPPING HERMANN FISCHER, PATENTANWALTSGESELLSCH, DE Representative=s name: EPPING HERMANN FISCHER PATENTANWALTSGESELLSCHA, DE |
|
R081 | Change of applicant/patentee |
Owner name: POLARIS INNOVATIONS LTD., IE Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE |
|
R082 | Change of representative |
Representative=s name: EPPING HERMANN FISCHER, PATENTANWALTSGESELLSCH, DE Representative=s name: EPPING HERMANN FISCHER PATENTANWALTSGESELLSCHA, DE |
|
R016 | Response to examination communication | ||
R002 | Refusal decision in examination/registration proceedings | ||
R003 | Refusal decision now final |