DE102019112985B4 - Verfahren zur Herstellung von Halbleiterbauelementen - Google Patents

Verfahren zur Herstellung von Halbleiterbauelementen Download PDF

Info

Publication number
DE102019112985B4
DE102019112985B4 DE102019112985.0A DE102019112985A DE102019112985B4 DE 102019112985 B4 DE102019112985 B4 DE 102019112985B4 DE 102019112985 A DE102019112985 A DE 102019112985A DE 102019112985 B4 DE102019112985 B4 DE 102019112985B4
Authority
DE
Germany
Prior art keywords
substrate
drift zone
doping
doped
implantation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE102019112985.0A
Other languages
German (de)
English (en)
Other versions
DE102019112985A1 (de
Inventor
Constantin Csato
Florian Krippendorf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MI2 Factory GmbH
Original Assignee
MI2 Factory GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MI2 Factory GmbH filed Critical MI2 Factory GmbH
Priority to DE102019112985.0A priority Critical patent/DE102019112985B4/de
Priority to EP20728420.9A priority patent/EP3970195B1/de
Priority to JP2021564508A priority patent/JP7405453B2/ja
Priority to PCT/EP2020/063556 priority patent/WO2020229639A1/de
Priority to US17/611,474 priority patent/US12368047B2/en
Publication of DE102019112985A1 publication Critical patent/DE102019112985A1/de
Application granted granted Critical
Publication of DE102019112985B4 publication Critical patent/DE102019112985B4/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H10D62/157—Impurity concentrations or distributions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
DE102019112985.0A 2019-05-16 2019-05-16 Verfahren zur Herstellung von Halbleiterbauelementen Active DE102019112985B4 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE102019112985.0A DE102019112985B4 (de) 2019-05-16 2019-05-16 Verfahren zur Herstellung von Halbleiterbauelementen
EP20728420.9A EP3970195B1 (de) 2019-05-16 2020-05-14 Verfahren zur herstellung von halbleiterbauelementen
JP2021564508A JP7405453B2 (ja) 2019-05-16 2020-05-14 半導体部品を製造するための方法
PCT/EP2020/063556 WO2020229639A1 (de) 2019-05-16 2020-05-14 Verfahren zur herstellung von halbleiterbauelementen und halbleiterbauelement
US17/611,474 US12368047B2 (en) 2019-05-16 2020-05-14 Method for producing semiconductor components, and semiconductor component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102019112985.0A DE102019112985B4 (de) 2019-05-16 2019-05-16 Verfahren zur Herstellung von Halbleiterbauelementen

Publications (2)

Publication Number Publication Date
DE102019112985A1 DE102019112985A1 (de) 2020-11-19
DE102019112985B4 true DE102019112985B4 (de) 2024-07-18

Family

ID=70857144

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102019112985.0A Active DE102019112985B4 (de) 2019-05-16 2019-05-16 Verfahren zur Herstellung von Halbleiterbauelementen

Country Status (5)

Country Link
US (1) US12368047B2 (https=)
EP (1) EP3970195B1 (https=)
JP (1) JP7405453B2 (https=)
DE (1) DE102019112985B4 (https=)
WO (1) WO2020229639A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20240047168A1 (en) * 2020-12-17 2024-02-08 mi2-factory GmbH Energy Filter Assembly for Ion Implantation System with at least one coupling element
WO2022128818A1 (de) 2020-12-18 2022-06-23 mi2-factory GmbH Elektronisches halbleiterbauelement und verfahren zur herstellung eines vorbehandelten verbundsubstrats für ein elektronisches halbleiterbauelement
DE102021109690A1 (de) 2021-04-16 2022-10-20 mi2-factory GmbH Elektronisches Halbleiterbauelement und Verfahren zur Herstellung eines vorbehandelten Verbundsubstrats für ein elektronisches Halbleiterbauelement
DE102020134222A1 (de) 2020-12-18 2022-06-23 mi2-factory GmbH Verfahren zur Herstellung eines vorbehandelten Verbundsubstrats und vorbehandeltes Verbundsubstrat
DE102021118315A1 (de) 2021-07-15 2023-01-19 mi2-factory GmbH Verfahren zur Herstellung eines elektronischen Halbleiterbauelements

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10239312A1 (de) 2002-08-27 2004-03-25 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauelements mit einer Driftzone und einer Feldstroppzone und Halbleiterbauelement mit einer Driftzone und einer Feldstroppzone
DE102013016669A1 (de) 2013-10-08 2015-04-09 Siltectra Gmbh Kombiniertes Herstellungsverfahren zum Abtrennen mehrerer dünner Festkörperschichten von einem dicken Festkörper
US20160233295A1 (en) 2015-02-06 2016-08-11 Infineon Technologies Ag SiC-Based Superjunction Semiconductor Device
DE102016110429A1 (de) 2016-06-06 2017-12-07 Infineon Technologies Ag Energiefilter zum Verarbeiten einer Leistungshalbleitervorrichtung

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3311210B2 (ja) * 1995-07-28 2002-08-05 株式会社東芝 半導体装置およびその製造方法
US7728409B2 (en) * 2005-11-10 2010-06-01 Fuji Electric Device Technology Co., Ltd. Semiconductor device and method of manufacturing the same
EP2782121B1 (en) * 2011-11-15 2021-01-06 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
JP2015192121A (ja) * 2014-03-28 2015-11-02 ローム株式会社 半導体装置およびその製造方法
CN108604600B (zh) * 2016-02-08 2021-07-16 三菱电机株式会社 碳化硅半导体装置及其制造方法
DE102016114264B4 (de) * 2016-08-02 2024-10-24 Infineon Technologies Ag Herstellungsverfahren einschliesslich einer aktivierung von dotierstoffen
DE102016122791B3 (de) * 2016-11-25 2018-05-30 mi2-factory GmbH Ionenimplantationsanlage, Filterkammer und Implantationsverfahren unter Einsatz eines Energiefilterelements
JP6833038B2 (ja) * 2017-07-19 2021-02-24 三菱電機株式会社 半導体装置の製造方法および半導体装置
DE102017117999B4 (de) * 2017-08-08 2025-12-11 Infineon Technologies Ag Ionenimplantationsvorrichtung und verfahren zum herstellen vonhalbleitervorrichtungen
DE102017122634B4 (de) * 2017-09-28 2024-09-12 Infineon Technologies Ag Siliziumcarbid-Halbleitervorrichtung mit Graben-Gatestruktur und vertikalem Pn-Übergang zwischen einem Bodygebiet und einer Driftstruktur
JP7117551B2 (ja) * 2019-03-22 2022-08-15 パナソニックＩｐマネジメント株式会社 半導体エピタキシャルウェハ、半導体素子、および半導体エピタキシャルウェハの製造方法
DE102019114312A1 (de) * 2019-05-28 2020-12-03 Infineon Technologies Ag Siliziumcarbid-vorrichtung mit kompensationsgebiet und herstellungsverfahren

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10239312A1 (de) 2002-08-27 2004-03-25 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauelements mit einer Driftzone und einer Feldstroppzone und Halbleiterbauelement mit einer Driftzone und einer Feldstroppzone
DE102013016669A1 (de) 2013-10-08 2015-04-09 Siltectra Gmbh Kombiniertes Herstellungsverfahren zum Abtrennen mehrerer dünner Festkörperschichten von einem dicken Festkörper
US20160233295A1 (en) 2015-02-06 2016-08-11 Infineon Technologies Ag SiC-Based Superjunction Semiconductor Device
DE102016110429A1 (de) 2016-06-06 2017-12-07 Infineon Technologies Ag Energiefilter zum Verarbeiten einer Leistungshalbleitervorrichtung

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LUTZ, J. [et al.]: Semiconductor Power Devices. Heidelberg : Springer, 2011. – ISBN 978-3-642-11124-2 *

Also Published As

Publication number Publication date
US12368047B2 (en) 2025-07-22
EP3970195C0 (de) 2026-02-18
DE102019112985A1 (de) 2020-11-19
EP3970195B1 (de) 2026-02-18
EP3970195A1 (de) 2022-03-23
US20220246431A1 (en) 2022-08-04
WO2020229639A1 (de) 2020-11-19
JP2022532048A (ja) 2022-07-13
JP7405453B2 (ja) 2023-12-26

Similar Documents

Publication Publication Date Title
DE102019112985B4 (de) Verfahren zur Herstellung von Halbleiterbauelementen
DE112015003483B4 (de) Verfahren zum herstellen einer halbleitervorrichtung
DE102007036147B4 (de) Verfahren zum Herstellen eines Halbleiterkörpers mit einer Rekombinationszone
DE102009038731B4 (de) Halbleiterbauelement mit Ladungsträgerkompensationsstruktur und Verfahren zur Herstellung eines Halbleiterbauelements
DE112011103469B4 (de) Halbleitervorrichtung
DE102018205274B4 (de) Halbleitervorrichtung und verfahren zu deren herstellung
DE112011105826B4 (de) Halbleitervorrichtung und Verfahren zur Herstellung selbiger
DE112013004362T5 (de) Halbleitervorrichtung
DE102017131354A1 (de) Ein Halbleiterbauelement mit breitem Bandabstand und ein Verfahren zum Bilden eines Halbleiterbauelements mit breitem Bandabstand
DE102005009000A1 (de) Mittels Feldeffekt steuerbares Halbleiterbauelement mit verbesserter Inversdiode und Herstellungsverfahren hierfür
DE102014101859B4 (de) Superjunction-Halbleitervorrichtung mit Überkompensationszonen und Verfahren zu deren Herstellung
DE112012001565T5 (de) Halbleitervorrichtung und Verfahren zur Herstellung derselben
DE112017003667B4 (de) Halbleitereinheit und Verfahren zur Herstellung einer Halbleitereinheit
DE102015109545B4 (de) Transistor mit Feldelektroden und verbessertem Lawinendurchbruchsverhalten
DE102013106795B4 (de) Halbleitervorrichtung mit einem Randgebiet und Verfahren zum Herstellen einer Halbleitervorrichtung
DE10240107B4 (de) Randabschluss für Leistungshalbleiterbauelement und für Diode sowie Verfahren zur Herstellung einer n-leitenden Zone für einen solchen Randabschluss
DE112017003513B4 (de) Halbleitereinheit und Verfahren zur Herstellung derselben
DE102005009020B4 (de) Verfahren zur Erzeugung eines Leistungstransistors und damit erzeugbare integrierte Schaltungsanordnung
WO2022128817A2 (de) Verfahren zur herstellung eines vorbehandelten verbundsubstrats und vorbehandeltes verbundsubstrat
EP3095136A1 (de) Sic-trench-transistor und verfahren zu dessen herstellung
DE112013000866B4 (de) Siliziumkarbid (SiC)-Halbleitervorrichtungen
DE102019135490B4 (de) Ionenstrahl-implantationsverfahren
DE102021123453A1 (de) Halbleitervorrichtung und deren Herstellungsverfahren
DE10245089A1 (de) Dotierverfahren und Halbleiterbauelement
DE102005032074B4 (de) Halbleiterbauelement mit Feldstopp

Legal Events

Date Code Title Description
R012 Request for examination validly filed
R016 Response to examination communication
R016 Response to examination communication
R130 Divisional application to

Ref document number: 102019009452

Country of ref document: DE

R018 Grant decision by examination section/examining division
R020 Patent grant now final
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0021266000

Ipc: H10P0030220000