DE102008028300B4 - Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung - Google Patents

Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung Download PDF

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Publication number
DE102008028300B4
DE102008028300B4 DE102008028300.2A DE102008028300A DE102008028300B4 DE 102008028300 B4 DE102008028300 B4 DE 102008028300B4 DE 102008028300 A DE102008028300 A DE 102008028300A DE 102008028300 B4 DE102008028300 B4 DE 102008028300B4
Authority
DE
Germany
Prior art keywords
circuit board
flexible area
layer
cover layer
flexible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE102008028300.2A
Other languages
German (de)
English (en)
Other versions
DE102008028300A1 (de
Inventor
Wolfgang Pahl
Hans Krüger
Dr. Demmer Peter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SnapTrack Inc
Original Assignee
TDK Electronics AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Electronics AG filed Critical TDK Electronics AG
Priority to DE102008028300.2A priority Critical patent/DE102008028300B4/de
Priority to PCT/EP2009/057051 priority patent/WO2009150133A1/de
Priority to US12/997,867 priority patent/US9035189B2/en
Priority to JP2011512955A priority patent/JP2011523223A/ja
Publication of DE102008028300A1 publication Critical patent/DE102008028300A1/de
Application granted granted Critical
Publication of DE102008028300B4 publication Critical patent/DE102008028300B4/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of flexible or folded printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09081—Tongue or tail integrated in planar structure, e.g. obtained by cutting from the planar structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09109—Locally detached layers, e.g. in multilayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322—Composite web or sheet

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
DE102008028300.2A 2008-06-13 2008-06-13 Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung Expired - Fee Related DE102008028300B4 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE102008028300.2A DE102008028300B4 (de) 2008-06-13 2008-06-13 Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung
PCT/EP2009/057051 WO2009150133A1 (de) 2008-06-13 2009-06-08 Leiterplatte mit flexiblem bereich und verfahren zur herstellung
US12/997,867 US9035189B2 (en) 2008-06-13 2009-06-08 Circuit board with flexible region and method for production thereof
JP2011512955A JP2011523223A (ja) 2008-06-13 2009-06-08 可撓領域を備えた回路基板およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102008028300.2A DE102008028300B4 (de) 2008-06-13 2008-06-13 Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung

Publications (2)

Publication Number Publication Date
DE102008028300A1 DE102008028300A1 (de) 2009-12-24
DE102008028300B4 true DE102008028300B4 (de) 2021-10-07

Family

ID=41058975

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102008028300.2A Expired - Fee Related DE102008028300B4 (de) 2008-06-13 2008-06-13 Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung

Country Status (4)

Country Link
US (1) US9035189B2 (https=)
JP (1) JP2011523223A (https=)
DE (1) DE102008028300B4 (https=)
WO (1) WO2009150133A1 (https=)

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DE102010034718B4 (de) 2010-08-18 2017-11-30 Deutsches Zentrum für Luft- und Raumfahrt e.V. Dehnbares Substrat mit einer Kontaktstelle zwischen einem polymerbasierten elektrischen Leiter und einem weiteren elektrischen Leiter
DE102011121818B4 (de) 2011-12-21 2024-08-14 Vitesco Technologies Germany Gmbh Anordnung eines elektronischen Bauteils in einem Gehäuse
JP5880428B2 (ja) * 2012-12-28 2016-03-09 株式会社オートネットワーク技術研究所 カードエッジコネクタ
DE102015208523A1 (de) * 2015-05-07 2016-11-10 Conti Temic Microelectronic Gmbh Leiterplatte und Verfahren zur Herstellung einer Leiterplatte
US20170027070A1 (en) * 2015-07-23 2017-01-26 Magna Closures Inc. Housing assembly of a power operated device and method of manufacturing thereof
EP3454312B1 (de) * 2017-09-11 2019-08-07 Siemens Schweiz AG Optischer rauchmelder mit einem aufschwenkbaren leiterplattenabschnitt mit einem darauf angeordneten lichtsender und/oder lichtempfänger
EP3562279A1 (de) * 2018-04-25 2019-10-30 Siemens Aktiengesellschaft Herstellung einer elektrischen verbindung von bauelementen mit einer kontaktierungsplatte
DE102019201281B4 (de) * 2019-01-31 2022-07-07 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Trägeranordnung und Verfahren zur Herstellung einer Trägeranordnung

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Publication number Priority date Publication date Assignee Title
DE19720106C2 (de) 1997-05-16 2001-03-15 Telefunken Microelectron Vorrichtung zur Aufnahme von elektrischen Bauteilen
US20040118595A1 (en) 2002-12-06 2004-06-24 Flammer Jeffrey D. Rigid-flex circuit board system
US20040145874A1 (en) 2003-01-23 2004-07-29 Stephane Pinel Method, system, and apparatus for embedding circuits
US20040244191A1 (en) 2001-10-25 2004-12-09 Bruce Orr Method of fabrication of micro-devices
DE102004028211A1 (de) 2004-06-09 2005-12-29 Robert Bosch Gmbh Streßoptimierte Leiterplatte
JP2006231174A (ja) 2005-02-23 2006-09-07 Matsushita Electric Works Ltd 有機物処理装置

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JPS58153468A (ja) 1982-03-05 1983-09-12 Sharp Corp テレビジヨン受像機の番組予約装置
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19720106C2 (de) 1997-05-16 2001-03-15 Telefunken Microelectron Vorrichtung zur Aufnahme von elektrischen Bauteilen
US20040244191A1 (en) 2001-10-25 2004-12-09 Bruce Orr Method of fabrication of micro-devices
US20040118595A1 (en) 2002-12-06 2004-06-24 Flammer Jeffrey D. Rigid-flex circuit board system
US20040145874A1 (en) 2003-01-23 2004-07-29 Stephane Pinel Method, system, and apparatus for embedding circuits
DE102004028211A1 (de) 2004-06-09 2005-12-29 Robert Bosch Gmbh Streßoptimierte Leiterplatte
JP2006231174A (ja) 2005-02-23 2006-09-07 Matsushita Electric Works Ltd 有機物処理装置

Also Published As

Publication number Publication date
US9035189B2 (en) 2015-05-19
JP2011523223A (ja) 2011-08-04
WO2009150133A1 (de) 2009-12-17
US20110214905A1 (en) 2011-09-08
DE102008028300A1 (de) 2009-12-24

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OP8 Request for examination as to paragraph 44 patent law
R016 Response to examination communication
R081 Change of applicant/patentee

Owner name: SNAPTRACK, INC., SAN DIEGO, US

Free format text: FORMER OWNER: EPCOS AG, 81669 MUENCHEN, DE

Owner name: TDK ELECTRONICS AG, DE

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R020 Patent grant now final
R081 Change of applicant/patentee

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R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee