DE102006036963A1 - Halbleiterbauelement mit Kontaktstelle und Herstellungsverfahren - Google Patents
Halbleiterbauelement mit Kontaktstelle und Herstellungsverfahren Download PDFInfo
- Publication number
- DE102006036963A1 DE102006036963A1 DE102006036963A DE102006036963A DE102006036963A1 DE 102006036963 A1 DE102006036963 A1 DE 102006036963A1 DE 102006036963 A DE102006036963 A DE 102006036963A DE 102006036963 A DE102006036963 A DE 102006036963A DE 102006036963 A1 DE102006036963 A1 DE 102006036963A1
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- Germany
- Prior art keywords
- ferrite
- layer
- further characterized
- forming
- signal line
- Prior art date
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
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Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
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KR1020050070396A KR100606654B1 (ko) | 2005-08-01 | 2005-08-01 | 전자파 장해 저감용 페라이트 차폐 구조를 구비하는 반도체패키지 및 그 제조 방법 |
KR10-2005-0070396 | 2005-08-01 | ||
US11/387,848 | 2006-03-24 | ||
US11/387,848 US7495317B2 (en) | 2005-08-01 | 2006-03-24 | Semiconductor package with ferrite shielding structure |
Publications (1)
Publication Number | Publication Date |
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DE102006036963A1 true DE102006036963A1 (de) | 2007-02-15 |
Family
ID=37681296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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DE102006036963A Ceased DE102006036963A1 (de) | 2005-08-01 | 2006-08-01 | Halbleiterbauelement mit Kontaktstelle und Herstellungsverfahren |
Country Status (2)
Country | Link |
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JP (1) | JP5138181B2 (ja) |
DE (1) | DE102006036963A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9721872B1 (en) | 2011-02-18 | 2017-08-01 | Amkor Technology, Inc. | Methods and structures for increasing the allowable die size in TMV packages |
KR101374148B1 (ko) * | 2012-06-08 | 2014-03-17 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 및 이의 제조 방법 |
US9799592B2 (en) | 2013-11-19 | 2017-10-24 | Amkor Technology, Inc. | Semicondutor device with through-silicon via-less deep wells |
KR101366461B1 (ko) | 2012-11-20 | 2014-02-26 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
KR101607981B1 (ko) | 2013-11-04 | 2016-03-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지 |
US9960328B2 (en) | 2016-09-06 | 2018-05-01 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2870162B2 (ja) * | 1990-07-20 | 1999-03-10 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
KR100313706B1 (ko) * | 1999-09-29 | 2001-11-26 | 윤종용 | 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법 |
JP3923368B2 (ja) * | 2002-05-22 | 2007-05-30 | シャープ株式会社 | 半導体素子の製造方法 |
JP4161911B2 (ja) * | 2004-01-30 | 2008-10-08 | ソニー株式会社 | 集積回路装置 |
EP1594163A1 (en) * | 2004-05-03 | 2005-11-09 | Commissariat A L'energie Atomique | A screened electrical device and a process for manufacturing the same |
-
2006
- 2006-05-25 JP JP2006145633A patent/JP5138181B2/ja active Active
- 2006-08-01 DE DE102006036963A patent/DE102006036963A1/de not_active Ceased
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Publication number | Publication date |
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JP5138181B2 (ja) | 2013-02-06 |
JP2007043090A (ja) | 2007-02-15 |
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