DE10130864A1 - Vertikal kontaktierte, übereinander gestapelte Chips - Google Patents

Vertikal kontaktierte, übereinander gestapelte Chips

Info

Publication number
DE10130864A1
DE10130864A1 DE10130864A DE10130864A DE10130864A1 DE 10130864 A1 DE10130864 A1 DE 10130864A1 DE 10130864 A DE10130864 A DE 10130864A DE 10130864 A DE10130864 A DE 10130864A DE 10130864 A1 DE10130864 A1 DE 10130864A1
Authority
DE
Germany
Prior art keywords
chip layer
contact
contact area
chip
contact surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE10130864A
Other languages
German (de)
English (en)
Inventor
Thomas Grasl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giesecke and Devrient GmbH
Original Assignee
Giesecke and Devrient GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giesecke and Devrient GmbH filed Critical Giesecke and Devrient GmbH
Priority to DE10130864A priority Critical patent/DE10130864A1/de
Priority to EP02745398A priority patent/EP1402575B1/de
Priority to AU2002316990A priority patent/AU2002316990A1/en
Priority to JP2003507891A priority patent/JP4481638B2/ja
Priority to DE50213010T priority patent/DE50213010D1/de
Priority to AT02745398T priority patent/ATE414328T1/de
Priority to PCT/EP2002/006861 priority patent/WO2003001597A2/de
Publication of DE10130864A1 publication Critical patent/DE10130864A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Battery Mounting, Suspending (AREA)
  • Crushing And Grinding (AREA)
  • Bipolar Transistors (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE10130864A 2001-06-21 2001-06-21 Vertikal kontaktierte, übereinander gestapelte Chips Withdrawn DE10130864A1 (de)

Priority Applications (7)

Application Number Priority Date Filing Date Title
DE10130864A DE10130864A1 (de) 2001-06-21 2001-06-21 Vertikal kontaktierte, übereinander gestapelte Chips
EP02745398A EP1402575B1 (de) 2001-06-21 2002-06-20 Vertikal kontaktierte, übereinander gestapelte chips
AU2002316990A AU2002316990A1 (en) 2001-06-21 2002-06-20 Vertically contacted stacked chips
JP2003507891A JP4481638B2 (ja) 2001-06-21 2002-06-20 垂直接触型積層チップ
DE50213010T DE50213010D1 (de) 2001-06-21 2002-06-20 Vertikal kontaktierte, übereinander gestapelte chips
AT02745398T ATE414328T1 (de) 2001-06-21 2002-06-20 Vertikal kontaktierte, übereinander gestapelte chips
PCT/EP2002/006861 WO2003001597A2 (de) 2001-06-21 2002-06-20 Vertikal kontaktierte, übereinander gestapelte chips

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10130864A DE10130864A1 (de) 2001-06-21 2001-06-21 Vertikal kontaktierte, übereinander gestapelte Chips

Publications (1)

Publication Number Publication Date
DE10130864A1 true DE10130864A1 (de) 2003-01-02

Family

ID=7689553

Family Applications (2)

Application Number Title Priority Date Filing Date
DE10130864A Withdrawn DE10130864A1 (de) 2001-06-21 2001-06-21 Vertikal kontaktierte, übereinander gestapelte Chips
DE50213010T Expired - Lifetime DE50213010D1 (de) 2001-06-21 2002-06-20 Vertikal kontaktierte, übereinander gestapelte chips

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE50213010T Expired - Lifetime DE50213010D1 (de) 2001-06-21 2002-06-20 Vertikal kontaktierte, übereinander gestapelte chips

Country Status (6)

Country Link
EP (1) EP1402575B1 (enExample)
JP (1) JP4481638B2 (enExample)
AT (1) ATE414328T1 (enExample)
AU (1) AU2002316990A1 (enExample)
DE (2) DE10130864A1 (enExample)
WO (1) WO2003001597A2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008075223A3 (en) * 2006-12-15 2008-10-09 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
WO2008137511A1 (en) * 2007-05-04 2008-11-13 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10049551A1 (de) * 1999-10-26 2001-05-03 Sharp Kk Gestapeltes Halbleiterbauteil

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206249A (ja) * 1985-03-11 1986-09-12 Hitachi Ltd 積層半導体集積回路装置
DE69133311T2 (de) * 1990-10-15 2004-06-24 Aptix Corp., San Jose Verbindungssubstrat mit integrierter Schaltung zur programmierbaren Verbindung und Probenuntersuchung
US5424589A (en) * 1993-02-12 1995-06-13 The Board Of Trustees Of The Leland Stanford Junior University Electrically programmable inter-chip interconnect architecture
DE4314907C1 (de) * 1993-05-05 1994-08-25 Siemens Ag Verfahren zur Herstellung von vertikal miteinander elektrisch leitend kontaktierten Halbleiterbauelementen
DE19702121C1 (de) * 1997-01-22 1998-06-18 Siemens Ag Verfahren zur Herstellung von vertikalen Chipverbindungen
DE19813239C1 (de) * 1998-03-26 1999-12-23 Fraunhofer Ges Forschung Verdrahtungsverfahren zur Herstellung einer vertikalen integrierten Schaltungsstruktur und vertikale integrierte Schaltungsstruktur

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10049551A1 (de) * 1999-10-26 2001-05-03 Sharp Kk Gestapeltes Halbleiterbauteil

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008075223A3 (en) * 2006-12-15 2008-10-09 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
GB2459395A (en) * 2006-12-15 2009-10-28 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
US8124429B2 (en) 2006-12-15 2012-02-28 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
GB2459395B (en) * 2006-12-15 2012-04-25 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
US8436454B2 (en) 2006-12-15 2013-05-07 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
WO2008137511A1 (en) * 2007-05-04 2008-11-13 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits
US8097526B2 (en) 2007-05-04 2012-01-17 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits
US8569879B2 (en) 2007-05-04 2013-10-29 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits
US8958227B2 (en) 2007-05-04 2015-02-17 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits
US9449952B2 (en) 2007-05-04 2016-09-20 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits
US9837129B2 (en) 2007-05-04 2017-12-05 Crossfire Technologies, Inc. Accessing or interconnecting integrated circuits

Also Published As

Publication number Publication date
JP2004531083A (ja) 2004-10-07
WO2003001597A3 (de) 2003-12-18
EP1402575A2 (de) 2004-03-31
EP1402575B1 (de) 2008-11-12
DE50213010D1 (de) 2008-12-24
WO2003001597A2 (de) 2003-01-03
JP4481638B2 (ja) 2010-06-16
ATE414328T1 (de) 2008-11-15
AU2002316990A1 (en) 2003-01-08

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Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8110 Request for examination paragraph 44
8139 Disposal/non-payment of the annual fee