CO2019001225A2 - Metodo de concordancia de tasas para los códigos ldpc - Google Patents
Metodo de concordancia de tasas para los códigos ldpcInfo
- Publication number
- CO2019001225A2 CO2019001225A2 CONC2019/0001225A CO2019001225A CO2019001225A2 CO 2019001225 A2 CO2019001225 A2 CO 2019001225A2 CO 2019001225 A CO2019001225 A CO 2019001225A CO 2019001225 A2 CO2019001225 A2 CO 2019001225A2
- Authority
- CO
- Colombia
- Prior art keywords
- bits
- rate matching
- matching method
- ldpc codes
- node
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 230000005540 biological transmission Effects 0.000 abstract 2
- 230000009897 systematic effect Effects 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000004080 punching Methods 0.000 abstract 1
- 238000012795 verification Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
Abstract
Un método para producir un conjunto de bits codificados a partir de un conjunto de bits de información para la transmisión entre un primer nodo (110, 115) y un segundo nodo (110, 115) en un sistema de comunicaciones inalámbricas (100), el método comprende generar (904) un vector de palabras de código que codifica el conjunto de bits de información con un código de verificación de paridad de baja densidad, en el que el vector de palabras de código está compuesto de bits sistemáticos y bits de paridad. El método comprende realizar (908) la concordancia de tasa con base en el búfer circular en el vector de palabras de código generado para producir los bits codificados para la transmisión, en el que la concordancia de tasa con base en el búfer circular comprende perforar una primera pluralidad de bits sistemáticos.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662374688P | 2016-08-12 | 2016-08-12 | |
PCT/IB2017/054889 WO2018029633A1 (en) | 2016-08-12 | 2017-08-10 | Rate matching methods for ldpc codes |
Publications (1)
Publication Number | Publication Date |
---|---|
CO2019001225A2 true CO2019001225A2 (es) | 2019-02-19 |
Family
ID=59859415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CONC2019/0001225A CO2019001225A2 (es) | 2016-08-12 | 2019-02-12 | Metodo de concordancia de tasas para los códigos ldpc |
Country Status (16)
Country | Link |
---|---|
US (5) | US10516419B2 (es) |
EP (2) | EP3681041B1 (es) |
JP (1) | JP6810790B2 (es) |
KR (1) | KR102126404B1 (es) |
CN (2) | CN110326220B (es) |
BR (1) | BR112019002500A2 (es) |
CA (1) | CA3031610C (es) |
CO (1) | CO2019001225A2 (es) |
DK (1) | DK3308469T3 (es) |
ES (2) | ES2787907T3 (es) |
FI (1) | FI3681041T3 (es) |
HU (1) | HUE060810T2 (es) |
PL (1) | PL3308469T3 (es) |
PT (1) | PT3308469T (es) |
RU (1) | RU2730434C1 (es) |
WO (1) | WO2018029633A1 (es) |
Families Citing this family (14)
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US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
US11043966B2 (en) | 2016-05-11 | 2021-06-22 | Qualcomm Incorporated | Methods and apparatus for efficiently generating multiple lifted low-density parity-check (LDPC) codes |
US10454499B2 (en) | 2016-05-12 | 2019-10-22 | Qualcomm Incorporated | Enhanced puncturing and low-density parity-check (LDPC) code structure |
US10469104B2 (en) | 2016-06-14 | 2019-11-05 | Qualcomm Incorporated | Methods and apparatus for compactly describing lifted low-density parity-check (LDPC) codes |
CN108400832B (zh) | 2017-02-06 | 2022-09-09 | 华为技术有限公司 | 数据处理方法和通信设备 |
CN111066252B (zh) | 2017-09-11 | 2023-01-06 | 中兴通讯股份有限公司 | 处理ldpc编码数据的方法和装置 |
US10972219B2 (en) * | 2018-09-24 | 2021-04-06 | Qualcomm Incorporated | LDPC interleaver design for improved error floor performance |
WO2020132873A1 (zh) * | 2018-12-25 | 2020-07-02 | 北京小米移动软件有限公司 | 数据传输方法及装置 |
US10826529B2 (en) | 2019-01-31 | 2020-11-03 | Hong Kong Applied Science And Technology Research Institute Co., Ltd. | Parallel LDPC decoder |
CN109952729B (zh) * | 2019-01-31 | 2021-12-03 | 香港应用科技研究院有限公司 | 并行ldpc解码器 |
WO2020155146A1 (en) * | 2019-01-31 | 2020-08-06 | Hong Kong Applied Science and Technology Research Institute Company Limited | Parallel ldpc decoder |
US10877729B2 (en) | 2019-01-31 | 2020-12-29 | Hong Kong Applied Science And Technology Research Institute Co., Ltd. | Reconfigurable segmented scalable shifter |
US11575390B2 (en) | 2021-07-02 | 2023-02-07 | Hong Kong Applied Science and Technology Research Insitute Co., Ltd. | Low-latency segmented quasi-cyclic low-density parity-check (QC-LDPC) decoder |
US11943051B2 (en) * | 2021-09-22 | 2024-03-26 | Qualcomm Incorporated | Rate matching and channel interleaving for probabilistic shaping |
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CN101924565B (zh) * | 2004-04-02 | 2014-10-15 | 苹果公司 | Ldpc编码器、解码器、系统及方法 |
US7526717B2 (en) * | 2004-06-16 | 2009-04-28 | Samsung Electronics Co., Ltd. | Apparatus and method for coding and decoding semi-systematic block low density parity check codes |
US7346832B2 (en) * | 2004-07-21 | 2008-03-18 | Qualcomm Incorporated | LDPC encoding methods and apparatus |
KR100984289B1 (ko) * | 2005-12-07 | 2010-09-30 | 포항공과대학교 산학협력단 | 통신 시스템에서 가변 부호화율을 지원하는 신호 송수신장치 및 방법 |
KR100981501B1 (ko) * | 2006-11-06 | 2010-09-10 | 연세대학교 산학협력단 | 통신 시스템에서 신호 송신 장치 및 방법 |
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CA2674719A1 (en) * | 2007-01-24 | 2008-07-31 | Qualcomm Incorporated | Ldpc encoding and decoding of packets of variable sizes |
KR100996030B1 (ko) * | 2007-03-06 | 2010-11-22 | 삼성전자주식회사 | 통신 시스템에서 신호 송수신 장치 및 방법 |
UA94655C2 (ru) * | 2007-03-27 | 2011-05-25 | Квелкомм Инкорпорейтед | Выравнивание скорости передачи на основе циклического буфера |
US7890834B2 (en) * | 2007-06-20 | 2011-02-15 | Motorola Mobility, Inc. | Apparatus comprising a circular buffer and method for assigning redundancy versions to a circular buffer |
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US8145970B2 (en) * | 2007-09-06 | 2012-03-27 | Broadcom Corporation | Data puncturing ensuring orthogonality within communication systems |
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US7924763B2 (en) * | 2007-12-11 | 2011-04-12 | Motorola Mobility, Inc. | Method and appratus for rate matching within a communication system |
WO2009094805A1 (en) * | 2008-01-25 | 2009-08-06 | Panasonic Corporation | Radio communication apparatus and interleaving method |
CN101630989B (zh) * | 2008-07-14 | 2012-10-03 | 上海华为技术有限公司 | 一种数据发送方法、装置及通信系统 |
WO2012169739A2 (ko) * | 2011-06-08 | 2012-12-13 | 엘지전자 주식회사 | 무선통신 시스템에서의 정보의 전송 방법 및 장치 |
US9100052B2 (en) * | 2013-02-01 | 2015-08-04 | Samsung Electronics Co., Ltd. | QC-LDPC convolutional codes enabling low power trellis-based decoders |
EP3113387B1 (en) * | 2014-03-21 | 2019-05-22 | Huawei Technologies Co., Ltd. | Polar code rate-matching method and rate-matching device |
US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
WO2017091018A1 (en) | 2015-11-24 | 2017-06-01 | Samsung Electronics Co., Ltd. | Method and apparatus for channel encoding/decoding in a communication or broadcasting system |
US10541781B2 (en) * | 2016-01-29 | 2020-01-21 | Intel IP Corporation | Rate matching using low-density parity-check codes |
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US10097314B2 (en) * | 2016-07-17 | 2018-10-09 | Intel Corporation | Apparatus, system and method of communicating a transmission encoded according to a low-density parity-check (LDPC) code |
US10425189B2 (en) * | 2016-07-29 | 2019-09-24 | Lg Electronics Inc. | Method for processing data block in LDPC encoder |
US9942886B1 (en) * | 2016-10-07 | 2018-04-10 | Qualcomm Incorporated | Variable physical uplink control channel (PUCCH) signaling and transmission |
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CA3131849A1 (en) | 2018-04-03 | 2019-10-10 | Christopher J.-P. Cardinal | Systems and methods for processing |
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2017
- 2017-08-10 DK DK17767925.5T patent/DK3308469T3/da active
- 2017-08-10 EP EP20160450.1A patent/EP3681041B1/en active Active
- 2017-08-10 KR KR1020197003677A patent/KR102126404B1/ko active IP Right Grant
- 2017-08-10 PL PL17767925T patent/PL3308469T3/pl unknown
- 2017-08-10 CA CA3031610A patent/CA3031610C/en active Active
- 2017-08-10 CN CN201780049527.5A patent/CN110326220B/zh active Active
- 2017-08-10 HU HUE20160450A patent/HUE060810T2/hu unknown
- 2017-08-10 FI FIEP20160450.1T patent/FI3681041T3/fi active
- 2017-08-10 PT PT177679255T patent/PT3308469T/pt unknown
- 2017-08-10 US US15/564,248 patent/US10516419B2/en active Active
- 2017-08-10 CN CN202310598398.2A patent/CN116827356A/zh active Pending
- 2017-08-10 BR BR112019002500-6A patent/BR112019002500A2/pt unknown
- 2017-08-10 WO PCT/IB2017/054889 patent/WO2018029633A1/en active Search and Examination
- 2017-08-10 ES ES17767925T patent/ES2787907T3/es active Active
- 2017-08-10 EP EP17767925.5A patent/EP3308469B1/en active Active
- 2017-08-10 RU RU2019106664A patent/RU2730434C1/ru active
- 2017-08-10 JP JP2019507315A patent/JP6810790B2/ja active Active
- 2017-08-10 ES ES20160450T patent/ES2931850T3/es active Active
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2019
- 2019-02-12 CO CONC2019/0001225A patent/CO2019001225A2/es unknown
- 2019-11-12 US US16/680,774 patent/US11031960B2/en active Active
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2021
- 2021-05-07 US US17/314,267 patent/US11588504B2/en active Active
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2023
- 2023-01-30 US US18/103,438 patent/US11870464B2/en active Active
- 2023-12-20 US US18/390,349 patent/US20240120950A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
US20200083913A1 (en) | 2020-03-12 |
CN110326220A (zh) | 2019-10-11 |
CA3031610C (en) | 2021-05-18 |
DK3308469T3 (da) | 2020-06-02 |
RU2730434C1 (ru) | 2020-08-21 |
FI3681041T3 (fi) | 2022-12-15 |
US20190052290A1 (en) | 2019-02-14 |
US20240120950A1 (en) | 2024-04-11 |
US11870464B2 (en) | 2024-01-09 |
PT3308469T (pt) | 2020-06-02 |
KR20190030213A (ko) | 2019-03-21 |
WO2018029633A1 (en) | 2018-02-15 |
CN116827356A (zh) | 2023-09-29 |
HUE060810T2 (hu) | 2023-04-28 |
EP3681041A1 (en) | 2020-07-15 |
EP3308469B1 (en) | 2020-03-11 |
US11588504B2 (en) | 2023-02-21 |
KR102126404B1 (ko) | 2020-06-24 |
CA3031610A1 (en) | 2018-02-15 |
US10516419B2 (en) | 2019-12-24 |
CN110326220B (zh) | 2023-06-02 |
JP2019534588A (ja) | 2019-11-28 |
US11031960B2 (en) | 2021-06-08 |
EP3308469A1 (en) | 2018-04-18 |
ES2787907T3 (es) | 2020-10-19 |
BR112019002500A2 (pt) | 2019-05-14 |
EP3681041B1 (en) | 2022-10-26 |
JP6810790B2 (ja) | 2021-01-06 |
US20210266017A1 (en) | 2021-08-26 |
ES2931850T3 (es) | 2023-01-03 |
US20230179230A1 (en) | 2023-06-08 |
PL3308469T3 (pl) | 2020-08-24 |
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