BR112019002500A2 - método e primeiro nó de correspondência de taxa para códigos ldpc - Google Patents
método e primeiro nó de correspondência de taxa para códigos ldpcInfo
- Publication number
- BR112019002500A2 BR112019002500A2 BR112019002500-6A BR112019002500A BR112019002500A2 BR 112019002500 A2 BR112019002500 A2 BR 112019002500A2 BR 112019002500 A BR112019002500 A BR 112019002500A BR 112019002500 A2 BR112019002500 A2 BR 112019002500A2
- Authority
- BR
- Brazil
- Prior art keywords
- bits
- rate matching
- node
- codeword vector
- ldpc codes
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 4
- 230000005540 biological transmission Effects 0.000 abstract 2
- 230000009897 systematic effect Effects 0.000 abstract 2
- 238000004080 punching Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Optical Communication System (AREA)
Abstract
um método de produzir um conjunto de bits codificados a partir de um conjunto de bits de informação para transmissão entre um primeiro nó (110, 115) e um segundo nó (110, 115) em um sistema de comunicações sem fio (100), o método compreende gerar (904) um vetor de palavras-código por codificar o conjunto de bits de informação com um código de verificação de paridade de baixa densidade, em que o vetor de palavras-código é composto por bits sistemáticos e bits de paridade. o método compreende desempenhar (908) correspondência de taxa baseada em buffer circular no vetor de palavras-código gerado para produzir os bits codificados para transmissão, em que a correspondência de taxa baseada em buffer circular compreende puncionar uma primeira pluralidade de bits sistemáticos.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662374688P | 2016-08-12 | 2016-08-12 | |
US62/374,688 | 2016-08-12 | ||
PCT/IB2017/054889 WO2018029633A1 (en) | 2016-08-12 | 2017-08-10 | Rate matching methods for ldpc codes |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112019002500A2 true BR112019002500A2 (pt) | 2019-05-14 |
Family
ID=59859415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112019002500-6A BR112019002500A2 (pt) | 2016-08-12 | 2017-08-10 | método e primeiro nó de correspondência de taxa para códigos ldpc |
Country Status (16)
Country | Link |
---|---|
US (5) | US10516419B2 (pt) |
EP (2) | EP3308469B1 (pt) |
JP (1) | JP6810790B2 (pt) |
KR (1) | KR102126404B1 (pt) |
CN (2) | CN116827356A (pt) |
BR (1) | BR112019002500A2 (pt) |
CA (1) | CA3031610C (pt) |
CO (1) | CO2019001225A2 (pt) |
DK (1) | DK3308469T3 (pt) |
ES (2) | ES2787907T3 (pt) |
FI (1) | FI3681041T3 (pt) |
HU (1) | HUE060810T2 (pt) |
PL (1) | PL3308469T3 (pt) |
PT (1) | PT3308469T (pt) |
RU (1) | RU2730434C1 (pt) |
WO (1) | WO2018029633A1 (pt) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
US11043966B2 (en) | 2016-05-11 | 2021-06-22 | Qualcomm Incorporated | Methods and apparatus for efficiently generating multiple lifted low-density parity-check (LDPC) codes |
US10454499B2 (en) | 2016-05-12 | 2019-10-22 | Qualcomm Incorporated | Enhanced puncturing and low-density parity-check (LDPC) code structure |
US10291354B2 (en) | 2016-06-14 | 2019-05-14 | Qualcomm Incorporated | High performance, flexible, and compact low-density parity-check (LDPC) code |
CN108400832B (zh) | 2017-02-06 | 2022-09-09 | 华为技术有限公司 | 数据处理方法和通信设备 |
US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
CA3073980C (en) | 2017-09-11 | 2022-11-01 | Zte Corporation | Methods and apparatus for processing ldpc coded data |
US10972219B2 (en) * | 2018-09-24 | 2021-04-06 | Qualcomm Incorporated | LDPC interleaver design for improved error floor performance |
EP3905561A4 (en) * | 2018-12-25 | 2022-08-17 | Beijing Xiaomi Mobile Software Co., Ltd. | DATA TRANSMISSION METHOD AND DEVICE |
US10877729B2 (en) | 2019-01-31 | 2020-12-29 | Hong Kong Applied Science And Technology Research Institute Co., Ltd. | Reconfigurable segmented scalable shifter |
WO2020155136A1 (en) * | 2019-01-31 | 2020-08-06 | Hong Kong Applied Science and Technology Research Institute Company Limited | Reconfigurable segmented scalable shifter |
CN109952729B (zh) * | 2019-01-31 | 2021-12-03 | 香港应用科技研究院有限公司 | 并行ldpc解码器 |
US10826529B2 (en) | 2019-01-31 | 2020-11-03 | Hong Kong Applied Science And Technology Research Institute Co., Ltd. | Parallel LDPC decoder |
CN113114271A (zh) * | 2021-03-11 | 2021-07-13 | 苏州华兴源创科技股份有限公司 | 低密度奇偶校验编码装置和方法 |
US11575390B2 (en) | 2021-07-02 | 2023-02-07 | Hong Kong Applied Science and Technology Research Insitute Co., Ltd. | Low-latency segmented quasi-cyclic low-density parity-check (QC-LDPC) decoder |
US11943051B2 (en) * | 2021-09-22 | 2024-03-26 | Qualcomm Incorporated | Rate matching and channel interleaving for probabilistic shaping |
Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005096510A1 (en) * | 2004-04-02 | 2005-10-13 | Nortel Networks Limited | Ldpc encoders, decoders, systems and methods |
US7526717B2 (en) * | 2004-06-16 | 2009-04-28 | Samsung Electronics Co., Ltd. | Apparatus and method for coding and decoding semi-systematic block low density parity check codes |
US7346832B2 (en) * | 2004-07-21 | 2008-03-18 | Qualcomm Incorporated | LDPC encoding methods and apparatus |
KR100984289B1 (ko) * | 2005-12-07 | 2010-09-30 | 포항공과대학교 산학협력단 | 통신 시스템에서 가변 부호화율을 지원하는 신호 송수신장치 및 방법 |
KR100981501B1 (ko) * | 2006-11-06 | 2010-09-10 | 연세대학교 산학협력단 | 통신 시스템에서 신호 송신 장치 및 방법 |
US9496986B2 (en) * | 2007-01-05 | 2016-11-15 | Lg Electronics Inc. | Layer mapping method and data transmission method for MIMO system |
WO2008092040A2 (en) * | 2007-01-24 | 2008-07-31 | Qualcomm Incorporated | Ldpc encoding and decoding of packets of variable sizes |
KR100996030B1 (ko) * | 2007-03-06 | 2010-11-22 | 삼성전자주식회사 | 통신 시스템에서 신호 송수신 장치 및 방법 |
CN101641896A (zh) * | 2007-03-27 | 2010-02-03 | 高通股份有限公司 | 基于循环缓冲器的速率匹配 |
US7890834B2 (en) * | 2007-06-20 | 2011-02-15 | Motorola Mobility, Inc. | Apparatus comprising a circular buffer and method for assigning redundancy versions to a circular buffer |
US8189559B2 (en) | 2007-07-23 | 2012-05-29 | Samsung Electronics Co., Ltd. | Rate matching for hybrid ARQ operations |
US8145970B2 (en) * | 2007-09-06 | 2012-03-27 | Broadcom Corporation | Data puncturing ensuring orthogonality within communication systems |
CN101188428B (zh) * | 2007-12-10 | 2012-09-05 | 中兴通讯股份有限公司 | 一种ldpc码的有限长度循环缓存的速率匹配方法 |
US7924763B2 (en) * | 2007-12-11 | 2011-04-12 | Motorola Mobility, Inc. | Method and appratus for rate matching within a communication system |
WO2009094805A1 (en) * | 2008-01-25 | 2009-08-06 | Panasonic Corporation | Radio communication apparatus and interleaving method |
CN101630989B (zh) * | 2008-07-14 | 2012-10-03 | 上海华为技术有限公司 | 一种数据发送方法、装置及通信系统 |
US9380135B2 (en) * | 2011-06-08 | 2016-06-28 | Lg Electronics Inc. | Method and device for information transmission in wireless communication system |
US9100052B2 (en) * | 2013-02-01 | 2015-08-04 | Samsung Electronics Co., Ltd. | QC-LDPC convolutional codes enabling low power trellis-based decoders |
RU2679723C1 (ru) * | 2014-03-21 | 2019-02-12 | Хуавэй Текнолоджиз Ко., Лтд. | Способ и устройство согласования скорости полярного кода |
US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
WO2017091018A1 (en) | 2015-11-24 | 2017-06-01 | Samsung Electronics Co., Ltd. | Method and apparatus for channel encoding/decoding in a communication or broadcasting system |
WO2017131813A1 (en) * | 2016-01-29 | 2017-08-03 | Intel IP Corporation | Rate matching using low-density parity-check codes |
US10523386B2 (en) * | 2016-06-24 | 2019-12-31 | Lg Electronics Inc. | Method of processing data block in wireless communication system and apparatus therefor |
US10362565B2 (en) * | 2016-06-29 | 2019-07-23 | Lg Electronics Inc. | Method and user equipment for transmitting uplink signal, and method and base station for receiving uplink signal |
US10097314B2 (en) * | 2016-07-17 | 2018-10-09 | Intel Corporation | Apparatus, system and method of communicating a transmission encoded according to a low-density parity-check (LDPC) code |
US10425189B2 (en) * | 2016-07-29 | 2019-09-24 | Lg Electronics Inc. | Method for processing data block in LDPC encoder |
US9942886B1 (en) * | 2016-10-07 | 2018-04-10 | Qualcomm Incorporated | Variable physical uplink control channel (PUCCH) signaling and transmission |
US10432227B2 (en) | 2017-01-24 | 2019-10-01 | Mediatek Inc. | Location of interleaver with LDPC code |
KR20210006884A (ko) | 2018-04-03 | 2021-01-19 | 아이디에이씨 홀딩스, 인크. | 비-지상 네트워크용 하이브리드 자동 반복 요청(harq) 기술 |
EP3774020A4 (en) | 2018-04-03 | 2022-01-19 | Monolith Materials, Inc. | TREATMENT SYSTEMS AND METHODS |
-
2017
- 2017-08-10 PL PL17767925T patent/PL3308469T3/pl unknown
- 2017-08-10 EP EP17767925.5A patent/EP3308469B1/en active Active
- 2017-08-10 US US15/564,248 patent/US10516419B2/en active Active
- 2017-08-10 CN CN202310598398.2A patent/CN116827356A/zh active Pending
- 2017-08-10 ES ES17767925T patent/ES2787907T3/es active Active
- 2017-08-10 CN CN201780049527.5A patent/CN110326220B/zh active Active
- 2017-08-10 PT PT177679255T patent/PT3308469T/pt unknown
- 2017-08-10 BR BR112019002500-6A patent/BR112019002500A2/pt unknown
- 2017-08-10 ES ES20160450T patent/ES2931850T3/es active Active
- 2017-08-10 HU HUE20160450A patent/HUE060810T2/hu unknown
- 2017-08-10 JP JP2019507315A patent/JP6810790B2/ja active Active
- 2017-08-10 EP EP20160450.1A patent/EP3681041B1/en active Active
- 2017-08-10 KR KR1020197003677A patent/KR102126404B1/ko active IP Right Grant
- 2017-08-10 FI FIEP20160450.1T patent/FI3681041T3/fi active
- 2017-08-10 CA CA3031610A patent/CA3031610C/en active Active
- 2017-08-10 DK DK17767925.5T patent/DK3308469T3/da active
- 2017-08-10 RU RU2019106664A patent/RU2730434C1/ru active
- 2017-08-10 WO PCT/IB2017/054889 patent/WO2018029633A1/en active Search and Examination
-
2019
- 2019-02-12 CO CONC2019/0001225A patent/CO2019001225A2/es unknown
- 2019-11-12 US US16/680,774 patent/US11031960B2/en active Active
-
2021
- 2021-05-07 US US17/314,267 patent/US11588504B2/en active Active
-
2023
- 2023-01-30 US US18/103,438 patent/US11870464B2/en active Active
- 2023-12-20 US US18/390,349 patent/US20240120950A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
US11870464B2 (en) | 2024-01-09 |
ES2787907T3 (es) | 2020-10-19 |
US20210266017A1 (en) | 2021-08-26 |
RU2730434C1 (ru) | 2020-08-21 |
CN110326220A (zh) | 2019-10-11 |
EP3681041B1 (en) | 2022-10-26 |
EP3308469A1 (en) | 2018-04-18 |
EP3681041A1 (en) | 2020-07-15 |
HUE060810T2 (hu) | 2023-04-28 |
CN116827356A (zh) | 2023-09-29 |
US10516419B2 (en) | 2019-12-24 |
KR102126404B1 (ko) | 2020-06-24 |
US20240120950A1 (en) | 2024-04-11 |
PT3308469T (pt) | 2020-06-02 |
US11031960B2 (en) | 2021-06-08 |
KR20190030213A (ko) | 2019-03-21 |
JP2019534588A (ja) | 2019-11-28 |
EP3308469B1 (en) | 2020-03-11 |
DK3308469T3 (da) | 2020-06-02 |
US20200083913A1 (en) | 2020-03-12 |
CA3031610A1 (en) | 2018-02-15 |
CO2019001225A2 (es) | 2019-02-19 |
US20230179230A1 (en) | 2023-06-08 |
FI3681041T3 (fi) | 2022-12-15 |
CN110326220B (zh) | 2023-06-02 |
US11588504B2 (en) | 2023-02-21 |
PL3308469T3 (pl) | 2020-08-24 |
WO2018029633A1 (en) | 2018-02-15 |
CA3031610C (en) | 2021-05-18 |
JP6810790B2 (ja) | 2021-01-06 |
US20190052290A1 (en) | 2019-02-14 |
ES2931850T3 (es) | 2023-01-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
BR112019002500A2 (pt) | método e primeiro nó de correspondência de taxa para códigos ldpc | |
SA518400286B1 (ar) | (idpc) تحسين الثقب وبنية شفرة لفحص التكافؤ منخفض الكثافة | |
BR112018073194A2 (pt) | métodos e aparelhos para a geração eficiente de códigos de verificação de paridade de baixa densidade elevada (ldpc) | |
BR112018074414A2 (pt) | codificação e decodificação de sinalização de controle com verificação de redundância seccional | |
BR112018009594A2 (pt) | perfuração para códigos de verificação de paridade de densidade baixa (ldpc) estruturados | |
MX2020004655A (es) | Transmisor y metodo de segmentacion del mismo. | |
BR112018014387A2 (pt) | segmentação de blocos de códigos para codificação adaptativa de carga útil usando códigos turbo e códigos ldpc | |
PH12019501554A1 (en) | Multiple low density parity check (ldpc) base graph design | |
BR112019002612A2 (pt) | emissão de bits de palavra-código para transmissão antes de carregar todos os bits de entrada | |
AR082369A1 (es) | Sistema y metodo para emitir señales de datos de control en una red de comunicaciones moviles | |
MX358339B (es) | Metodo de comunicacion y dispositivo de comunicacion. | |
MX2017011147A (es) | Transmisor y metodo de acortamiento del mismo. | |
MY191567A (en) | Transmitter and repetition method thereof | |
MX2017011152A (es) | Transmisor y metodo de segmentacion del mismo. | |
MX2014012118A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 4/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
ATE541362T1 (de) | Verkürzen und punktieren von low-density-parity- check (ldpc) codes für die kanalcodierung/- decodierung | |
MX350602B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 64800 y un índice de código de 7/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX350599B (es) | Codificador de revisión de paridad de baja densidad y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX350313B (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 2/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
MX350607B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 16200 y un índice de código de 4/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX2014012115A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 5/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
MX2014012117A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 3/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
MX2014012119A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 5/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
MX2014012116A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 2/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
MX350606B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 16200 y un índice de código de 3/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
B350 | Update of information on the portal [chapter 15.35 patent gazette] | ||
B06W | Patent application suspended after preliminary examination (for patents with searches from other patent authorities) chapter 6.23 patent gazette] |