CN219778881U - Substrate for high-power semiconductor packaging - Google Patents
Substrate for high-power semiconductor packaging Download PDFInfo
- Publication number
- CN219778881U CN219778881U CN202320789060.0U CN202320789060U CN219778881U CN 219778881 U CN219778881 U CN 219778881U CN 202320789060 U CN202320789060 U CN 202320789060U CN 219778881 U CN219778881 U CN 219778881U
- Authority
- CN
- China
- Prior art keywords
- substrate
- power semiconductor
- semiconductor
- mounting groove
- viscose
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 239000000758 substrate Substances 0.000 title claims abstract description 42
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 16
- 229920000297 Rayon Polymers 0.000 claims abstract description 14
- 239000003292 glue Substances 0.000 claims description 6
- 230000017525 heat dissipation Effects 0.000 abstract description 9
- 238000010438 heat treatment Methods 0.000 abstract description 4
- 239000000853 adhesive Substances 0.000 description 14
- 230000001070 adhesive effect Effects 0.000 description 14
- 238000000034 method Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 230000003139 buffering effect Effects 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- -1 gold tin copper aluminum Chemical compound 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model relates to the technical field of semiconductor packaging, in particular to a substrate for high-power semiconductor packaging. The technical scheme includes that the semiconductor device comprises a substrate body, a semiconductor body and viscose, wherein a mounting groove is formed in the upper surface of the substrate body, the semiconductor body is fixedly mounted in the mounting groove through the viscose, elastic protrusions are arranged at the bottom of the inner wall of the mounting groove and located inside the viscose, radiating fins are arranged on the lower surface of the substrate body, through holes are formed in the outer surface of the radiating fins, and supporting columns are arranged on the lower surface of the substrate body. The utility model can improve the heat dissipation efficiency of the substrate and the high-power semiconductor, and simultaneously avoid the imagination of tearing of the viscose by heating expansion and the falling of the high-power semiconductor from the substrate.
Description
Technical Field
The utility model relates to the technical field of semiconductor packaging, in particular to a substrate for high-power semiconductor packaging.
Background
Semiconductor packaging refers to the process of processing a wafer that passes testing to obtain individual chips according to product model and functional requirements. The packaging process is as follows: the wafer from the wafer front process is cut into small chips (Die) through the dicing process, then the cut chips are attached to the corresponding islands of the substrate (Lead frame) frame by glue, and then the bonding pads (Bond pads) of the chips are connected to the corresponding pins (Lead) of the substrate by using ultra-fine metal (gold tin copper aluminum) wires or conductive resin, and the required circuit is formed; and then packaging and protecting the independent wafer by using a plastic shell, performing a series of operations after plastic packaging, performing finished product testing after packaging, generally performing procedures such as checking in, testing Test and packaging, and finally warehousing and delivering.
Along with the current trend that the size of the high-power semiconductor package structure is smaller and smaller, the power of the chip in the high-power semiconductor package structure is larger and the heat productivity of the unit area is larger and larger, and the adhesive between the high-power semiconductor and the substrate is easy to be torn and damaged due to thermal expansion, so that the high-power semiconductor is separated from the substrate main body.
Disclosure of Invention
The utility model aims to provide a substrate for high-power semiconductor packaging, which can improve the heat dissipation efficiency of the substrate and a high-power semiconductor, avoid the imagination of tearing of adhesive due to thermal expansion, avoid the falling of the high-power semiconductor from the substrate, and solve the problems that the chip in the high-power semiconductor packaging structure has larger power and larger heating value per unit area along with the smaller and smaller volume of the high-power semiconductor packaging structure at present, and the adhesive between the high-power semiconductor and the substrate is easy to tear and damage due to thermal expansion, so that the high-power semiconductor falls from the substrate.
In order to achieve the above purpose, the present utility model provides the following technical solutions: the utility model provides a high-power base plate for semiconductor encapsulation, includes base plate main part, semiconductor main part and viscose, base plate main part upper surface is provided with the mounting groove, the inside semiconductor main part that has through viscose fixed mounting of mounting groove, the bottom of mounting groove inner wall is provided with elastic bulge, and elastic bulge is located inside the viscose, base plate main part lower surface is provided with radiating fin, radiating fin surface is provided with the through-hole, base plate main part lower surface is provided with the pillar.
Preferably, the support posts are four in total, and the four support posts are respectively arranged on the lower surface of the substrate main body and close to four corner positions.
Preferably, the outer surfaces of the four support posts are provided with notches, and the lower surfaces of the four support posts are provided with mounting holes.
Preferably, the lower surface of the substrate main body is provided with a groove.
Compared with the prior art, the utility model has the following beneficial effects:
according to the utility model, the substrate main body, the elastic protrusions, the adhesive, the semiconductor main body, the radiating fins and the through holes are arranged, so that the radiating efficiency of the substrate and the high-power semiconductor is improved, the imagination of thermal expansion and tearing of the adhesive is avoided, the falling-off effect of the high-power semiconductor from the substrate is avoided, the elastic protrusions which are uniformly distributed are inserted into the adhesive to provide expansion buffering space for the thermal expansion adhesive, the expansion and tearing of the adhesive are avoided, the falling-off of the high-power semiconductor from the substrate main body is avoided, the radiating area of the substrate main body is increased by the radiating fins, the radiating efficiency is improved, the radiating area of the radiating fins is further increased by the arrangement of the through holes, and the weight of the radiating fins is reduced.
Drawings
FIG. 1 is a schematic diagram of the main sectional structure of the present utility model;
FIG. 2 is a schematic view of a partial main sectional structure of a strut of the present utility model;
fig. 3 is an enlarged schematic view of the structure of fig. 1 a according to the present utility model.
Reference numerals: 1. a support post; 2. a substrate main body; 3. a mounting groove; 4. a semiconductor body; 5. a viscose; 6. an elastic protrusion; 7. a mounting hole; 8. a notch; 9. a groove; 10. a heat radiation fin; 11. and a through hole.
Detailed Description
The technical scheme of the utility model is further described below with reference to the attached drawings and specific embodiments.
As shown in fig. 1 to 3, the substrate for packaging a high-power semiconductor provided by the utility model comprises a substrate main body 2, a semiconductor main body 4 and an adhesive 5, wherein a mounting groove 3 is arranged on the upper surface of the substrate main body 2, the semiconductor main body 4 is fixedly arranged in the mounting groove 3 through the adhesive 5, the adhesive 6 is insulated, the semiconductor main body 4 is a high-power semiconductor, elastic bulges 6 are arranged at the bottom of the inner wall of the mounting groove 3, the elastic bulges 6 are arranged in the adhesive 5, a plurality of elastic bulges 6 are uniformly arranged at the bottom of the inner wall of the mounting groove 3, a buffer space is provided for the adhesive 5 which is expanded by heating, the adhesive 5 is prevented from being torn by being heated and expanded, a radiating fin 10 is arranged on the lower surface of the substrate main body 2, a plurality of radiating fins 10 are arranged at the same, and a plurality of radiating fin 10 equidistance sets up in base plate main part 2 lower surface, radiating fin 10 surface is provided with through-hole 11, through-hole 11 side view is the rectangle, the through-hole 11 be provided with be favorable to the circulation of air of base plate main part 2 below, radiating fin 10's radiating area has also been increased simultaneously, radiating efficiency has been improved, and the weight of radiating fin 10 has been reduced, base plate main part 2 lower surface is provided with pillar 1, base plate main part 2 lower surface is provided with recess 9, recess 9's setting can increase the radiating area of base plate main part 2 lower surface, improve the radiating efficiency of base plate main part 2, pillar 1 is equipped with four altogether, and four pillar 1 set up respectively in base plate main part 2 lower surface and be close to four corner positions department, four pillar 1 surface all are equipped with breach 8, four pillar 1 lower surfaces all are equipped with mounting hole 7.
When the heat dissipation fin is used, the elastic bulges 6 which are uniformly distributed are inserted into the viscose glue 5 to provide expansion buffering space for the viscose glue 5 which is expanded by heating, so that the expansion and tearing of the viscose glue 5 are avoided, the semiconductor main body 4 is prevented from falling off from the substrate main body 2, the heat dissipation area of the substrate main body 2 can be increased by the heat dissipation fin 10, the heat dissipation efficiency is improved, the heat dissipation area of the heat dissipation fin 10 is further increased by the arrangement of the through holes 11, and the weight of the heat dissipation fin 10 is reduced.
The above-described embodiments are merely a few preferred embodiments of the present utility model, and many alternative modifications and combinations of the above-described embodiments will be apparent to those skilled in the art based on the technical solutions of the present utility model and the related teachings of the above-described embodiments.
Claims (4)
1. The utility model provides a high power semiconductor packaging is with base plate, includes base plate main part (2), semiconductor main part (4) and viscose (5), its characterized in that: the semiconductor device comprises a substrate body (2), wherein a mounting groove (3) is formed in the upper surface of the substrate body (2), a semiconductor body (4) is fixedly mounted in the mounting groove (3) through viscose glue (5), an elastic bulge (6) is arranged at the bottom of the inner wall of the mounting groove (3), the elastic bulge (6) is located inside the viscose glue (5), a radiating fin (10) is arranged on the lower surface of the substrate body (2), a through hole (11) is formed in the outer surface of the radiating fin (10), and a support column (1) is arranged on the lower surface of the substrate body (2).
2. The substrate for high-power semiconductor package according to claim 1, wherein: the support columns (1) are arranged in four in total, and the four support columns (1) are respectively arranged on the lower surface of the substrate main body (2) and close to four corner positions.
3. The substrate for high-power semiconductor package according to claim 2, wherein: the outer surfaces of the four support posts (1) are provided with notches (8), and the lower surfaces of the four support posts (1) are provided with mounting holes (7).
4. The substrate for high-power semiconductor package according to claim 1, wherein: the lower surface of the substrate main body (2) is provided with a groove (9).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320789060.0U CN219778881U (en) | 2023-04-11 | 2023-04-11 | Substrate for high-power semiconductor packaging |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320789060.0U CN219778881U (en) | 2023-04-11 | 2023-04-11 | Substrate for high-power semiconductor packaging |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219778881U true CN219778881U (en) | 2023-09-29 |
Family
ID=88104869
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320789060.0U Active CN219778881U (en) | 2023-04-11 | 2023-04-11 | Substrate for high-power semiconductor packaging |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219778881U (en) |
-
2023
- 2023-04-11 CN CN202320789060.0U patent/CN219778881U/en active Active
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