CN218274573U - Semiconductor package having semiconductor chip - Google Patents

Semiconductor package having semiconductor chip Download PDF

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Publication number
CN218274573U
CN218274573U CN202221746920.4U CN202221746920U CN218274573U CN 218274573 U CN218274573 U CN 218274573U CN 202221746920 U CN202221746920 U CN 202221746920U CN 218274573 U CN218274573 U CN 218274573U
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China
Prior art keywords
semiconductor chip
heat
semiconductor package
fixedly connected
semiconductor
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CN202221746920.4U
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Chinese (zh)
Inventor
唐志超
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Shenzhen Sina Technology Co ltd
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Shenzhen Sina Technology Co ltd
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Abstract

The utility model discloses a semiconductor package with semiconductor chip, including the base plate main part, the upper surface of base plate main part is seted up flutedly, the inside fixedly connected with semiconductor chip board of recess, the through-hole has been seted up to one side of base plate main part surface, the one end of through-hole runs through the surface of base plate main part and extends to the inside of recess. This semiconductor package body with semiconductor chip, through the through-hole, the setting of heat-conducting plate and fin, fix the heat-conducting plate in the through-hole earlier during the use, the heat accessible heat-conducting plate that produces in the semiconductor package body use diffuses, utilize the heat-conducting plate to have the characteristic of heat conduction, make the heat conduction in the recess outside the base plate main part, the rethread fin gives off the heat that the heat-conducting plate absorbed to the air in, thereby have radiating effect, the fin through two makes the radiating effect better, prevent effectively that semiconductor chip is overheated to cause the influence to the performance.

Description

Semiconductor package having semiconductor chip
Technical Field
The utility model relates to a semiconductor package technical field, in particular to semiconductor package with semiconductor chip.
Background
Currently, the electronic industry tends to manufacture products of high reliability at low cost, thereby achieving lightness in weight, miniaturization, high-speed operation, multi-functionality, and high performance, a package assembly technique is considered as one of important techniques for achieving the purpose of designing such products, the package assembly technique is intended to protect a semiconductor chip having an integrated circuit formed therein from the external environment and to easily mount the semiconductor chip to a substrate, thereby ensuring the operational reliability of the semiconductor chip, the semiconductor package is a process of processing a wafer passing a test to obtain individual chips according to product models and functional requirements, the packaging process is: the wafer from the previous wafer process is cut into small chips (Die) through a scribing process, the cut chips are attached to small islands of corresponding substrate (Lead frame) frames through glue, and bonding pads (BondPad) of the chips are connected to corresponding pins (Lead) of the substrate through superfine metal (gold tin copper aluminum) wires or conductive resin to form a required circuit.
Through search, the chinese patent with the chinese patent application number CN201710289319.4 discloses a stacked semiconductor package with compliant corners, which also has the following disadvantages that the semiconductor chip generates heat after working, if the heat is not dissipated in time, the electronic element is easily damaged, and the semiconductor package does not have a heat dissipation function, thereby affecting the use of the semiconductor chip.
SUMMERY OF THE UTILITY MODEL
The main object of the present invention is to provide a semiconductor package with a semiconductor chip, which can effectively solve the problems of the background art.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
the semiconductor packaging body with the semiconductor chip comprises a substrate main body, wherein a groove is formed in the upper surface of the substrate main body, a semiconductor chip board is fixedly connected inside the groove, and a silica gel layer is coated on the upper surface of the semiconductor chip board; the through-hole has been seted up to one side of base plate main part surface, the one end of through-hole runs through the surface of base plate main part and extends to the inside of recess, the inside fixedly connected with heat-conducting plate of through-hole, the outer fixed surface of heat-conducting plate is connected with the fin.
In order to make have sealed effect, as the utility model discloses semiconductor package with semiconductor chip, the last fixed surface of base plate main part is connected with the encapsulation lid, the last fixed surface of encapsulation lid is connected with the bracing piece.
In order to make the effect that has the activity, as the utility model discloses semiconductor package with semiconductor chip, the sleeve has been cup jointed on the top of bracing piece, telescopic last fixed surface is connected with the baffle.
In order to make the purpose that has the resilience, as the utility model discloses semiconductor package with semiconductor chip, the spring has been cup jointed to the surface of bracing piece, the one end and the encapsulation lid of spring are fixed connection.
In order to make the effect that has easy to assemble, as the utility model discloses semiconductor package with semiconductor chip, first fixed orifices has been seted up to one side of base plate main part upper surface, the second fixed orifices has been seted up to the opposite side of base plate main part upper surface.
In order to make the effect that has the connection, as the utility model discloses semiconductor package with semiconductor chip, the first pin of the positive one side fixedly connected with of base plate main part, the positive opposite side fixedly connected with second pin of base plate main part.
In order to make the connection more firm, as the utility model discloses semiconductor package with semiconductor chip, one side fixedly connected with third pin at the base plate main part back, the opposite side fixedly connected with fourth pin at the base plate main part back.
In order to make the convenient seal mark, conduct the utility model discloses semiconductor package with semiconductor chip, the sign groove has been seted up to one side of base plate main part surface.
Compared with the prior art, the utility model discloses following beneficial effect has:
1. the utility model discloses in, through the through-hole, the setting of heat-conducting plate and fin, fix the heat-conducting plate in the through-hole earlier during the use, the heat accessible heat-conducting plate that produces in the semiconductor packaging body use diffuses, utilize the heat-conducting plate to have the characteristic of heat conduction, make the heat conduction in the recess outside to the base plate main part, during the rethread fin gives off the air with the absorptive heat of heat-conducting plate, thereby have radiating effect, it is better to make the radiating effect through two fins, effectively prevent that semiconductor chip is overheated to cause the influence to the performance.
2. The utility model discloses in, through the setting of bracing piece, sleeve, baffle and spring, when the semiconductor package body received the striking of top in the use, utilize the baffle to press and move the bracing piece, make the bracing piece can contract in the sleeve through telescopic effect, the spring atress warp this moment, utilize the characteristic of spring-back can effectively cushion the striking that the baffle received, utilize the baffle to have the effect that separates the shelves simultaneously, thereby avoid the semiconductor package body to receive the damage chip after the striking, prolong the life of semiconductor package body greatly.
Drawings
Fig. 1 is a schematic front view of a semiconductor package having a semiconductor chip according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a groove structure of a semiconductor package having a semiconductor chip according to embodiment 1 of the present invention;
fig. 3 is a schematic view of a baffle structure of a semiconductor package having a semiconductor chip according to embodiment 1 of the present invention;
fig. 4 is an exploded view of a semiconductor package having a semiconductor chip according to embodiment 1 of the present invention;
fig. 5 is a schematic rear view of a semiconductor package having a semiconductor chip according to embodiment 2 of the present invention.
In the figure: 1. a substrate main body; 2. a groove; 3. a semiconductor chip board; 4. a silica gel layer; 5. a heat conducting plate; 6. a heat sink; 7. a package cover; 8. a support bar; 9. a sleeve; 10. a baffle plate; 11. a spring; 12. a first fixing hole; 13. a second fixing hole; 14. a first pin; 15. a second pin; 16. a third pin; 17. a fourth pin; 18. and marking a groove.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts all belong to the protection scope of the present invention.
Example 1
As shown in fig. 1-4, a semiconductor package with a semiconductor chip includes a substrate body 1, a groove 2 is formed on an upper surface of the substrate body 1, a semiconductor chip board 3 is fixedly connected inside the groove 2, and a silica gel layer 4 is coated on an upper surface of the semiconductor chip board 3;
in this embodiment, a through hole is opened at one side of the outer surface of the substrate body 1, one end of the through hole penetrates through the outer surface of the substrate body 1 and extends to the inside of the groove 2, a heat conducting plate 5 is fixedly connected inside the through hole, and a heat radiating fin 6 is fixedly connected to the outer surface of the heat conducting plate 5.
During the specific use, the heat accessible heat-conducting plate 5 that produces in the semiconductor package body use diffuses, utilizes heat-conducting plate 5 to have the characteristic of heat conduction, makes the heat conduction in the recess 2 outside to base plate main part 1, and rethread fin 6 gives off the heat that heat-conducting plate 5 absorbs to the air in to have radiating effect, 6 messenger's radiating effect through two fins is better, prevents effectively that semiconductor chip is overheated to cause the influence to the performance.
In this embodiment, a package cover 7 is fixedly connected to the upper surface of the substrate body 1, and a support rod 8 is fixedly connected to the upper surface of the package cover 7.
When the substrate is used specifically, the substrate main body 1 is sealed by the packaging cover 7, and the substrate main body can stretch in the sleeve 9 under the action of the supporting rod 8, so that the baffle 10 is convenient to move.
In this embodiment, the top end of the support rod 8 is sleeved with a sleeve 9, and a baffle 10 is fixedly connected to the upper surface of the sleeve 9.
When the semiconductor package is impacted, the supporting rod 8 is pressed by the baffle 10, and the supporting rod 8 can be contracted in the sleeve 9 under the action of the sleeve 9.
In this embodiment, a spring 11 is sleeved on an outer surface of the supporting rod 8, and one end of the spring 11 is fixedly connected with the sealing cover 7.
When the shock absorber is used specifically, the supporting rod 8 can be contracted in the sleeve 9, the spring 11 is stressed to deform at the moment, and the impact on the baffle 10 can be effectively buffered by utilizing the rebounding characteristic of the spring 11.
In this embodiment, a first fixing hole 12 is formed on one side of the upper surface of the substrate body 1, and a second fixing hole 13 is formed on the other side of the upper surface of the substrate body 1.
When the substrate main body is used specifically, the substrate main body 1 is clamped by a tool conveniently through the first fixing hole 12 and the second fixing hole 13, and the substrate main body has the effect of being convenient to install.
In this embodiment, first pins 14 are fixedly connected to one side of the front surface of the substrate body 1, and second pins 15 are fixedly connected to the other side of the front surface of the substrate body 1.
When the substrate is used specifically, the substrate body 1 is conveniently fixed on a circuit board through the use of the first pins 14 and the second pins 15, and the substrate has the effect of convenient welding.
In this embodiment, a third lead 16 is fixedly connected to one side of the back surface of the substrate body 1, and a fourth lead 17 is fixedly connected to the other side of the back surface of the substrate body 1.
When the novel substrate is used specifically, the substrate body 1 is fixed more firmly through the third pins 16 and the fourth pins 17, and the welding cracking phenomenon can be avoided.
The working principle is as follows: fix heat-conducting plate 5 in the through-hole earlier during the use, heat accessible heat-conducting plate 5 that produces in the semiconductor package body use diffuses, utilize heat-conducting plate 5 to have the characteristic of heat conduction, make heat conduction in the recess 2 outside base plate main part 1, in the air is gived off with heat-conducting plate 5 absorptive heat to rethread fin 6, thereby have radiating effect, 6 messenger's radiating effect through two fins is better, effectively prevent semiconductor chip overheat and lead to the fact the influence to the performance, when the semiconductor package body received the striking of top, utilize baffle 10 to press bracing piece 8, effect through sleeve 9 makes bracing piece 8 can contract in sleeve 9, spring 11 atress deformation this moment, the characteristic that utilizes spring 11 to kick-back can effectively cushion the striking that baffle 10 received, simultaneously, utilize baffle 10 to have the effect at a distance from, thereby avoid the semiconductor package body to receive the striking after-damage the chip, prolong the life of semiconductor package body greatly.
Example 2
As shown in fig. 5, the distinguishing features of this embodiment that distinguish embodiment 1 are: one side of the outer surface of the substrate body 1 is provided with a mark groove 18.
When the marking groove 18 is used specifically, nameplates such as trademarks can be engraved in the marking groove 18, and the marking groove has the effect of convenient identification.
The basic principles and the main features of the invention and the advantages of the invention have been shown and described above. It will be understood by those skilled in the art that the present invention is not limited to the above embodiments, and that the foregoing embodiments and descriptions are provided only to illustrate the principles of the present invention without departing from the spirit and scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (8)

1. Semiconductor package with a semiconductor chip, comprising a substrate body (1), characterized in that: a groove (2) is formed in the upper surface of the substrate main body (1), a semiconductor chip board (3) is fixedly connected inside the groove (2), and a silica gel layer (4) is coated on the upper surface of the semiconductor chip board (3);
the through-hole has been seted up to one side of base plate main part (1) surface, the one end of through-hole runs through the surface of base plate main part (1) and extends to the inside of recess (2), the inside fixedly connected with heat-conducting plate (5) of through-hole, the outer fixed surface of heat-conducting plate (5) is connected with fin (6).
2. The semiconductor package with a semiconductor chip according to claim 1, wherein: the upper surface of the substrate main body (1) is fixedly connected with a packaging cover (7), and the upper surface of the packaging cover (7) is fixedly connected with a supporting rod (8).
3. The semiconductor package with a semiconductor chip according to claim 2, wherein: the top end of the supporting rod (8) is sleeved with a sleeve (9), and the upper surface of the sleeve (9) is fixedly connected with a baffle (10).
4. The semiconductor package with a semiconductor chip according to claim 2, wherein: the outer surface of the supporting rod (8) is sleeved with a spring (11), and one end of the spring (11) is fixedly connected with the packaging cover (7).
5. The semiconductor package with a semiconductor chip according to claim 1, wherein: a first fixing hole (12) is formed in one side of the upper surface of the substrate main body (1), and a second fixing hole (13) is formed in the other side of the upper surface of the substrate main body (1).
6. The semiconductor package with a semiconductor chip as claimed in claim 1, wherein: the circuit board is characterized in that a first pin (14) is fixedly connected to one side of the front face of the substrate main body (1), and a second pin (15) is fixedly connected to the other side of the front face of the substrate main body (1).
7. The semiconductor package with a semiconductor chip according to claim 1, wherein: one side of the back surface of the substrate body (1) is fixedly connected with a third pin (16), and the other side of the back surface of the substrate body (1) is fixedly connected with a fourth pin (17).
8. The semiconductor package with a semiconductor chip according to claim 1, wherein: one side of the outer surface of the substrate main body (1) is provided with a mark groove (18).
CN202221746920.4U 2022-07-08 2022-07-08 Semiconductor package having semiconductor chip Active CN218274573U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221746920.4U CN218274573U (en) 2022-07-08 2022-07-08 Semiconductor package having semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221746920.4U CN218274573U (en) 2022-07-08 2022-07-08 Semiconductor package having semiconductor chip

Publications (1)

Publication Number Publication Date
CN218274573U true CN218274573U (en) 2023-01-10

Family

ID=84760263

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202221746920.4U Active CN218274573U (en) 2022-07-08 2022-07-08 Semiconductor package having semiconductor chip

Country Status (1)

Country Link
CN (1) CN218274573U (en)

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