CN214313189U - High-efficient heat dissipation chip package structure - Google Patents

High-efficient heat dissipation chip package structure Download PDF

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Publication number
CN214313189U
CN214313189U CN202023005623.8U CN202023005623U CN214313189U CN 214313189 U CN214313189 U CN 214313189U CN 202023005623 U CN202023005623 U CN 202023005623U CN 214313189 U CN214313189 U CN 214313189U
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China
Prior art keywords
heat dissipation
chip
package structure
resin
chip package
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Active
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CN202023005623.8U
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Chinese (zh)
Inventor
赵文杰
黄世岳
赵亮
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Siliconware Technology Suzhou Co ltd
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Siliconware Technology Suzhou Co ltd
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Priority to CN202023005623.8U priority Critical patent/CN214313189U/en
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Abstract

The utility model discloses a high-efficient heat dissipation chip package structure, including the base plate, and set up the chip on the base plate, the chip top is provided with the fin through the resin, the louvre has been seted up on the resin, the louvre runs through the resin, the louvre intussuseption is equipped with tin. The utility model discloses technical scheme's advantage mainly embodies: the heat inside the substrate can be timely dissipated through tin in the heat dissipation through hole, and the heat dissipation inside the chip can be more direct, so that the overall heat dissipation effect is better.

Description

High-efficient heat dissipation chip package structure
Technical Field
The utility model belongs to the technical field of the semiconductor package, concretely relates to high-efficient heat dissipation chip package structure.
Background
In the IC integrated circuit industry, the flip Chip Ball Grid array (FC-bga) is also the predominant package format for the graphic acceleration Chip. The heat can be generated in the chip packaging process, and the generated heat needs to be timely dissipated and volatilized to ensure the normal operation of the chip. In order to provide heat dissipation, a heat sink is generally disposed on the surface of the semiconductor package, but some chips (TFBGA chips, thin fine pitch ball grid array integrated circuit chips) are arranged in a strip shape, and the heat sink can only increase the heat dissipation on the surface of the semiconductor package, and the heat generated by the chips still needs to be slowly transferred to the heat sink through the whole plastic package, resulting in poor heat dissipation effect.
SUMMERY OF THE UTILITY MODEL
The utility model aims at solving the above problem existing in the prior art, providing a high-efficient heat dissipation chip package structure.
The purpose of the utility model can be realized through the following technical scheme:
the utility model provides a high-efficient heat dissipation chip package structure, includes the base plate, and sets up the chip on the base plate, the chip top is provided with the fin through resin, the louvre has been seted up on the resin, the louvre runs through the resin, the louvre intussuseption is equipped with tin.
Preferably, the green paint surface of the heat sink is in contact with the resin.
Preferably, the bottom of the substrate is provided with solder balls.
Preferably, the chip is in electrical communication with the substrate by a wire.
Preferably, the green paint surface of the chip is attached to the substrate.
Preferably, the substrate is provided with a grounding position, and the heat dissipation holes are arranged above the grounding position of the substrate, so that copper on the substrate can be conducted to the outside through tin.
The utility model discloses technical scheme's advantage mainly embodies: the heat inside the substrate can be timely dissipated through tin in the radiating holes, the heat dissipation inside the chip can be more direct, and the overall radiating effect is better.
Drawings
Fig. 1 is a schematic structural diagram of the present invention.
Detailed Description
Objects, advantages and features of the present invention will be illustrated and explained by the following non-limiting description of preferred embodiments. These embodiments are merely exemplary embodiments for applying the technical solutions of the present invention, and all technical solutions formed by adopting equivalent substitutions or equivalent transformations fall within the scope of the present invention.
The utility model discloses a high-efficient heat dissipation chip package structure combines fig. 1 to show, including base plate 1, and set up chip 3 on base plate 1, the bottom of base plate 1 is provided with tin ball 7. The chip 3 is electrically connected to the substrate 1 through a wire. The green paint surface 2 of the chip 3 is attached to the substrate 1. A radiating fin 6 is arranged above the chip 3 through resin 5, and a green paint surface 2 of the radiating fin 6 is in contact with the resin 4.
In order to better dissipate heat, the resin 5 is provided with heat dissipation holes 5, the heat dissipation holes 5 penetrate through the resin 4, and in order to further improve the speed and effect of heat dissipation, the heat dissipation holes 5 are filled with tin. Of course, other metals may be used for the tin. The substrate 1 is provided with a connection position, and the heat dissipation holes 5 are arranged above the connection position of the substrate 1. The cross-sectional shape of the heat dissipation hole 5 may be trapezoidal or rectangular, and the like, which is not limited herein. The through-holes may be drilled by a laser or by a machine drill. The tin in the through-hole 5 will be directly connected to the heat sink 6, thus acting as a better conducting bridge.
The utility model discloses a heat in the base plate can directly dispel the heat through the tin in the through-hole, just the inside heat of chip also can accelerate the heat dissipation through the tin in the through-hole, has avoided holistic slow heat dissipation layer upon layer among the prior art packaging structure. The heat dissipation efficiency is greatly improved.
The utility model has a plurality of implementation modes, and all technical schemes formed by adopting equivalent transformation or equivalent transformation all fall within the protection scope of the utility model.

Claims (6)

1. The utility model provides a high-efficient heat dissipation chip package structure, includes the base plate, and sets up the chip on the base plate, its characterized in that: the chip is provided with a radiating fin through resin above, the resin is provided with radiating holes, the radiating holes penetrate through the resin, and tin is filled in the radiating holes.
2. The high efficiency heat dissipating chip package structure of claim 1, wherein: the green paint surface of the heat sink is in contact with the resin.
3. The high efficiency heat dissipating chip package structure of claim 2, wherein: and the bottom of the substrate is provided with a solder ball.
4. The high efficiency heat dissipating chip package structure of claim 3, wherein: the chip is in electrical communication with the substrate via a wire.
5. The high efficiency heat dissipating chip package structure of claim 4, wherein: the green paint surface of the chip is attached to the substrate.
6. The high efficiency heat dissipating chip package structure of claim 5, wherein: the base plate is provided with a connection position, and the heat dissipation holes are arranged above the connection position of the base plate.
CN202023005623.8U 2020-12-15 2020-12-15 High-efficient heat dissipation chip package structure Active CN214313189U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202023005623.8U CN214313189U (en) 2020-12-15 2020-12-15 High-efficient heat dissipation chip package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202023005623.8U CN214313189U (en) 2020-12-15 2020-12-15 High-efficient heat dissipation chip package structure

Publications (1)

Publication Number Publication Date
CN214313189U true CN214313189U (en) 2021-09-28

Family

ID=77853599

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202023005623.8U Active CN214313189U (en) 2020-12-15 2020-12-15 High-efficient heat dissipation chip package structure

Country Status (1)

Country Link
CN (1) CN214313189U (en)

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