CN212587482U - A top heat dissipation semiconductor product and electronic product - Google Patents
A top heat dissipation semiconductor product and electronic product Download PDFInfo
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- CN212587482U CN212587482U CN202020564050.3U CN202020564050U CN212587482U CN 212587482 U CN212587482 U CN 212587482U CN 202020564050 U CN202020564050 U CN 202020564050U CN 212587482 U CN212587482 U CN 212587482U
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- Prior art keywords
- chip
- heat sink
- semiconductor product
- substrate
- top heat
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 230000017525 heat dissipation Effects 0.000 title claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 33
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical class [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 239000004593 Epoxy Substances 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- 238000005538 encapsulation Methods 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910010293 ceramic material Inorganic materials 0.000 claims description 3
- 229910021389 graphene Inorganic materials 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 3
- MPTQRFCYZCXJFQ-UHFFFAOYSA-L copper(II) chloride dihydrate Chemical compound O.O.[Cl-].[Cl-].[Cu+2] MPTQRFCYZCXJFQ-UHFFFAOYSA-L 0.000 claims 5
- 239000003822 epoxy resin Substances 0.000 abstract description 10
- 229920000647 polyepoxide Polymers 0.000 abstract description 10
- 230000000694 effects Effects 0.000 abstract description 5
- 239000000463 material Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 150000001336 alkenes Chemical class 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- -1 graphite alkene Chemical class 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
本实用新型公开一种顶部散热半导体产品，包括基板、设置在所述基板上方的芯片以及用于封装所述芯片的环氧树脂，所述基板具有相对设置的基板上表面以及基板下表面，所述芯片设置在所述基板上表面上，用于封装所述芯片的环氧树脂上设置有延伸至所述芯片的散热片安装孔，所述散热片安装孔中设置有顶部散热片，所述顶部散热片的一面与所述芯片抵接，另一面延伸至所述环氧树脂外部。本方案中通过在芯片上方设置散热片安装孔，并在散热片安装孔中设置与芯片接触的顶部散热片，通过顶部散热片将芯片上的人热量快速扩散出去，可以避免由于环氧树脂热传导性能不好带来的芯片温度难以降低的技术问题，提高芯片散热效果，提升产品品质及使用寿命。
The utility model discloses a top heat dissipation semiconductor product, including a substrate, a chip arranged above the substrate, and an epoxy resin for encapsulating the chip, wherein the substrate has an upper surface and a lower surface of the substrate arranged opposite to each other, the chip is arranged on the upper surface of the substrate, and the epoxy resin for encapsulating the chip is provided with a heat sink mounting hole extending to the chip, a top heat sink is arranged in the heat sink mounting hole, one side of the top heat sink is in contact with the chip, and the other side extends to the outside of the epoxy resin. In this solution, by providing a heat sink mounting hole above the chip, and providing a top heat sink in contact with the chip in the heat sink mounting hole, the heat on the chip is quickly diffused away through the top heat sink, thereby avoiding the technical problem that the chip temperature is difficult to reduce due to the poor thermal conductivity of the epoxy resin, improving the heat dissipation effect of the chip, and improving the product quality and service life.
Description
Technical Field
The utility model relates to a semiconductor product technical field especially relates to a top heat dissipation semiconductor product and use its electronic product.
Background
The semiconductor is a material with a conductive capability between a conductor and a non-conductor, and the semiconductor element belongs to a solid-state element according to the characteristics of the semiconductor material, the volume of the semiconductor element can be reduced to a small size, so the power consumption is low, the integration level is high, the semiconductor element is widely applied in the field of electronic technology, and the heat dissipation performance becomes one of important indexes of the semiconductor element along with the gradual increase of the operating power of the semiconductor element, and under the high-heat working environment, the maintenance of the working reliability of the semiconductor element is a very important problem.
Because the power IC chip needs more leading-out terminals, the package is mostly carried out by adopting a substrate, the package appearance is LGA and BGA, but the substrate has poor heat dissipation effect, and the package development of the IC is restricted.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an aim at: the patent refers to the field of 'semiconductor devices and electric solid state devices'.
In order to achieve the purpose, the utility model adopts the following technical proposal:
on the one hand, provide a top heat dissipation semiconductor product, be in including base plate, setting the chip of base plate top and be used for the encapsulation the epoxy of chip, the base plate has relative base plate upper surface and the base plate lower surface that sets up, the chip sets up on the base plate upper surface, be used for the encapsulation be provided with on the epoxy of chip extend to the fin mounting hole of chip, be provided with the top fin in the fin mounting hole, the one side of top fin with the chip butt, the another side extends to the epoxy is outside.
As a preferable technical solution of the top heat dissipation semiconductor product, the heat sink mounting hole has an inverted trapezoidal structure, and the width of the heat sink mounting hole gradually increases from the end close to the chip to the end far from the chip.
As a preferable aspect of the top heat dissipation semiconductor product, the top heat dissipation plate extends from the heat dissipation plate mounting hole to each surface of the epoxy resin.
As a preferable technical solution of the top heat dissipation semiconductor product, a plurality of heat dissipation grooves are arranged on the surface of the top heat dissipation plate, and the distances between adjacent heat dissipation grooves are the same.
As a preferable technical solution of the top heat dissipation semiconductor product, the top heat sink is provided.
As a preferred solution of the top heat dissipation semiconductor product, the chip is in contact with all the top heat sinks simultaneously.
As a preferable technical solution of the top heat dissipation semiconductor product, the top heat dissipation plate is made of graphene, graphene-modified copper, metallic copper, aluminum, or a ceramic material.
As a preferable technical solution of the top heat dissipation semiconductor product, the chip includes an upper chip surface and a lower chip surface which are oppositely disposed, the lower chip surface is disposed toward the upper substrate surface, and the upper chip surface is electrically connected to the outside through a metal wire.
As a preferable technical solution of the top heat dissipation semiconductor product, an in-substrate copper line penetrating through the substrate is disposed on the substrate, the upper surface of the chip is electrically connected to the in-substrate copper line through the metal wire, and the top heat dissipation semiconductor product is electrically connected to the outside through the in-substrate copper line.
In another aspect, an electronic product is provided, which has the semiconductor product with top heat dissipation as described above.
The utility model has the advantages that: through setting up the fin mounting hole in the chip top in this scheme to set up the top fin with the chip contact in the fin mounting hole, spread away the people's heat on the chip fast through the top fin, can avoid improving chip radiating effect because the not good chip temperature who brings of epoxy heat-conduction performance is difficult to the technical problem who reduces, promotes product quality and life.
Drawings
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Fig. 1 is a schematic structural view of a top heat dissipation semiconductor product according to an embodiment of the present invention.
Fig. 2 is another schematic structural diagram of a top heat dissipation semiconductor product according to an embodiment of the present invention.
Fig. 3 is another schematic structural diagram of a top heat dissipation semiconductor product according to an embodiment of the present invention.
Fig. 4 is a schematic view of another structure of a top heat dissipation semiconductor product according to an embodiment of the present invention.
In the figure:
100. a substrate; 200. a chip; 300. an epoxy resin; 400. a top heat sink; 500. a bonding material; 600. a copper line in the substrate; 700. a metal wire.
Detailed Description
In order to make the technical problem solved by the present invention, the technical solutions adopted by the present invention and the technical effects achieved by the present invention clearer, the embodiments of the present invention are described in further detail below, and it is obvious that the described embodiments are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, unless otherwise expressly specified or limited, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning permanently connected, detachably connected, or integral to one another; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact between the first and second features, or may comprise contact between the first and second features not directly. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
As shown in fig. 1, the present embodiment provides a top heat dissipation semiconductor product, including a substrate 100, a chip 200 disposed above the substrate 100, and an epoxy resin 300 for encapsulating the chip 200, where the substrate 100 has an upper surface of the substrate 100 and a lower surface of the substrate 100 that are disposed opposite to each other, the chip 200 is disposed on the upper surface of the substrate 100, a heat sink mounting hole extending to the chip 200 is disposed on the epoxy resin 300 for encapsulating the chip 200, a top heat sink 400 is disposed in the heat sink mounting hole, one surface of the top heat sink 400 abuts against the chip 200 and is fixed by an adhesive material 500, and the other surface extends to the outside of the epoxy resin 300.
Through set up the fin mounting hole in chip 200 top in this scheme to set up the top fin 400 with chip 200 contact in the fin mounting hole, spread away the people's heat on chip 200 fast through top fin 400, can avoid improving chip 200 radiating effect because the not good chip 200 temperature that brings of epoxy 300 heat conductivility is difficult to the technical problem who reduces, promotes product quality and life.
Specifically, in this embodiment, the heat sink mounting hole is stepped, and the size of the end close to the chip 200 is smaller than the size of the end far from the chip 200.
In the embodiment shown in fig. 2, the heat sink mounting hole has an inverted trapezoidal structure, and gradually widens from the end near the chip 200 to the end far from the chip 200.
By setting the heat sink mounting hole to a structure that the end portion close to the chip 200 becomes wider gradually toward the end portion far away from the chip 200, the heat on the chip 200 can be diffused quickly after being transferred to the top heat sink 400, and the heat dissipation speed is increased.
In a preferred embodiment of the present solution, as shown in fig. 3, the top heat sink 400 extends from the heat sink mounting hole to each surface of the epoxy resin 300.
By providing the top heat sink 400 to extend to the respective surfaces of the epoxy 300, the heat dissipation area of the top heat sink 400 is increased, so that the temperature of the top heat sink 400 can be rapidly lowered, thereby effectively dissipating heat from the chip 200.
In a preferred embodiment of the present invention, as shown in fig. 4, a plurality of heat dissipation grooves are formed on the surface of the top heat dissipation plate 400, and the distances between the adjacent heat dissipation grooves are the same. The heat dissipation area of the top heat dissipation sheet 400 can be increased by providing the heat dissipation grooves, and the heat dissipation efficiency is improved.
In the top heat dissipation semiconductor product of this embodiment, there is one heat sink mounting hole, and it should be noted that in other embodiments, there may be a plurality of heat sink mounting holes, and each heat sink mounting hole is provided with at least one top heat sink 400. The chip 200 is in contact with all of the top heat sinks 400 simultaneously. The chip 200 is simultaneously heat-dissipated by the plurality of top heat sinks 400.
In this scheme top fin 400 can adopt graphite alkene, graphite alkene modified copper, metallic copper, aluminium or ceramic material to make.
In this embodiment, graphene is used as a material for dissipating heat from the top.
The chip 200 includes an upper surface and a lower surface, which are oppositely disposed, and the lower surface of the chip is disposed toward the upper surface of the substrate 100, and the upper surface of the chip is electrically connected to the outside through a metal wire. The substrate 100 is provided with an in-substrate copper line 600 penetrating through the substrate 100, the upper surface of the chip is electrically connected with the in-substrate copper line 600 through the metal wire 700, and the top heat dissipation semiconductor product is electrically connected with the outside through the in-substrate copper line 600.
Meanwhile, the embodiment also provides an electronic product which is provided with the top heat dissipation semiconductor product.
In the description herein, it is to be understood that the terms "upper," "lower," "left," "right," and the like are used merely for convenience in description and simplicity in operation, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principle of the present invention is described above with reference to specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without any inventive effort, which would fall within the scope of the present invention.
Claims (10)
1. The utility model provides a top heat dissipation semiconductor product, includes base plate (100), sets up chip (200) and the epoxy (300) that is used for the encapsulation of base plate (100) top base plate (100), its characterized in that, base plate (100) have relative base plate (100) upper surface and base plate (100) lower surface that sets up, chip (200) set up on base plate (100) upper surface, be used for the encapsulation be provided with on epoxy (300) of chip (200) and extend to the fin mounting hole of chip (200), be provided with top fin (400) in the fin mounting hole, the one side of top fin (400) with chip (200) butt, the another side extends to epoxy (300) outside.
2. The top-dissipating semiconductor product of claim 1, wherein the heat sink mounting hole has an inverted trapezoidal configuration, and widens from an end near the chip (200) to an end away from the chip (200).
3. The top-dissipating semiconductor product of claim 2, wherein the top heatsink (400) extends from the heatsink mounting hole to each surface of the epoxy (300).
4. The top heat dissipating semiconductor product of claim 3, wherein the top heat sink (400) has a surface provided with a plurality of heat dissipating grooves, and the distance between adjacent heat dissipating grooves is the same.
5. The top-dissipating semiconductor product of claim 1, wherein the heat sink mounting holes are provided in a plurality, and at least one top heat sink (400) is provided in each of the heat sink mounting holes.
6. The top-dissipating semiconductor product of claim 5, wherein the chip (200) is in contact with all of the top heat sinks (400) simultaneously.
7. The top heat dissipating semiconductor product of claim 1, wherein the top heat sink (400) is made of graphene, graphene-modified copper, metallic copper, aluminum, or a ceramic material.
8. The top-dissipating semiconductor product of claim 1, wherein the chip (200) comprises an upper chip surface and a lower chip surface which are oppositely disposed, the lower chip surface is disposed toward the upper substrate (100) surface, and the upper chip surface is electrically connected to the outside through a metal wire (700).
9. The top heat dissipating semiconductor product of claim 8, wherein the substrate (100) is provided with an in-substrate copper trace (600) penetrating the substrate (100), the upper surface of the chip (200) is electrically connected to the in-substrate copper trace (600) through the metal wire (700), and the top heat dissipating semiconductor product is electrically connected to the outside through the in-substrate copper trace (600).
10. An electronic product having the top heat dissipating semiconductor product of any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020564050.3U CN212587482U (en) | 2020-04-15 | 2020-04-15 | A top heat dissipation semiconductor product and electronic product |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020564050.3U CN212587482U (en) | 2020-04-15 | 2020-04-15 | A top heat dissipation semiconductor product and electronic product |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212587482U true CN212587482U (en) | 2021-02-23 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020564050.3U Active CN212587482U (en) | 2020-04-15 | 2020-04-15 | A top heat dissipation semiconductor product and electronic product |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212587482U (en) |
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2020
- 2020-04-15 CN CN202020564050.3U patent/CN212587482U/en active Active
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