CN215377395U - Packaging structure for semiconductor chip - Google Patents
Packaging structure for semiconductor chip Download PDFInfo
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- CN215377395U CN215377395U CN202121567924.1U CN202121567924U CN215377395U CN 215377395 U CN215377395 U CN 215377395U CN 202121567924 U CN202121567924 U CN 202121567924U CN 215377395 U CN215377395 U CN 215377395U
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- shell
- heat dissipation
- package structure
- semiconductor chips
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Abstract
The application discloses a packaging structure for semiconductor chip, including first shell, second shell, pottery heat conduction cover, fin, lead electrical pillar, lower cushion, deformation hole, heat dissipation silica gel piece, silicon-based body, convex part, recess, bell jar, spliced pole and chip electrode. The heat dissipation mechanism has the advantages that the heat dissipation mechanism is additionally arranged, heat dissipation of the position of the top surface is facilitated, heat is facilitated to be dissipated, the overall using effect is improved, the overall heat dissipation effect is good, the sufficient heat dissipation area is achieved, and the heat dissipation effect is improved.
Description
Technical Field
The application relates to the field of semiconductor chip packaging, in particular to a packaging structure for a semiconductor chip.
Background
The semiconductor packaging refers to a process of processing a wafer passing a test according to a product model and a functional requirement to obtain an independent chip. The packaging process comprises the following steps: a wafer from a wafer previous process is cut into small chips (Die) through a scribing process, then the cut chips are pasted on small islands of corresponding substrate (Lead frame) frames through glue, and bonding pads (Bond pads) of the chips are connected to corresponding pins (Lead) of the substrate through superfine metal (gold tin copper aluminum) wires or conductive resin to form a required circuit; and then packaging and protecting the independent wafer by using a plastic shell, carrying out a series of operations after plastic packaging, carrying out finished product testing after packaging, generally carrying out procedures such as inspection, Test, packaging and the like, and finally warehousing and shipping.
In the prior art, when a packaging structure of a semiconductor chip is used, packaging protection is carried out; the heat dissipation performance may be insufficient, the formed semiconductor chip is not easy to dissipate heat, the heat dissipation is convenient, and the heat dissipation effect may be poor. Accordingly, a package structure for a semiconductor chip is proposed to address the above problems.
Disclosure of Invention
The present embodiment provides a package structure for a semiconductor chip to solve the problem in the prior art that heat dissipation is not easily generated after a semiconductor chip is packaged.
According to one aspect of the application, a packaging structure for a semiconductor chip is provided, which comprises a first shell, a second shell and a silicon-based body, wherein a heat dissipation mechanism is fixedly installed at the top of the silicon-based body, and the bottoms of the silicon-based body and the heat dissipation mechanism are fixedly wrapped inside the first shell; the second shell is fixedly installed at the bottom of the first shell, the silicon-based body is connected with a plurality of conductive columns, and the conductive columns penetrate through the bottom of the second shell.
Further, the heat dissipation mechanism comprises a ceramic heat conduction sleeve and a heat dissipation silica gel sheet, the ceramic heat conduction sleeve wraps the upper portion of the silicon-based body, and the heat dissipation silica gel sheet is filled between the ceramic heat conduction sleeve and the silicon-based body.
Furthermore, the top of the ceramic heat conduction sleeve is provided with a plurality of radiating fins which are distributed at equal intervals.
Furthermore, a plurality of tapered grooves which are distributed at equal intervals are formed in two sides of the ceramic heat conduction sleeve, and the tapered grooves are of tapered structures.
Furthermore, a plurality of convex parts are uniformly arranged at the top of the heat dissipation silica gel sheet, and the convex parts are connected with the grooves arranged on the inner wall of the ceramic heat conduction sleeve in an embedded mode.
Furthermore, a chip electrode is arranged inside the second shell and connected with the silicon-based body through a connecting column.
Furthermore, the connecting column penetrates through the bottom shell wall of the first shell, and the connecting column is fixedly connected with the first shell.
Further, the chip electrode is connected with the conductive column, and the conductive column is fixedly mounted at the bottom of the second housing.
Furthermore, a metal conducting strip is connected between the conducting column and the chip electrode.
Furthermore, a lower soft pad is fixedly bonded at the bottom of the second shell, and a plurality of deformation holes are formed in the lower soft pad at equal intervals.
Through the above-mentioned embodiment of this application, it has add heat dissipation mechanism, is convenient for carry out the heat dissipation of top surface position department, and the thermal effluvium of being convenient for has improved holistic result of use, and holistic radiating effect is better, has sufficient heat radiating area, has improved radiating effect.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a schematic overall structure diagram of an embodiment of the present application;
FIG. 2 is a schematic view of the internal structure of a first housing according to an embodiment of the present application;
fig. 3 is a schematic structural view of two sides of a ceramic heat conducting sleeve according to an embodiment of the present application.
In the figure: 1. the silicon chip comprises a first shell, a second shell, a ceramic heat conduction sleeve, 4, a cooling fin, 5, a conductive column, 6, a lower cushion, 7, a deformation hole, 8, a heat dissipation silica gel sheet, 9, a silicon substrate body, 10, a convex part, 11, a groove, 12, a conical groove, 13, a connecting column, 14 and a chip electrode.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In this application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
Furthermore, the terms "mounted," "disposed," "provided," "connected," and "sleeved" are to be construed broadly. For example, it may be a fixed connection, a removable connection, or a unitary construction; can be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intervening media, or may be in internal communication between two devices, elements or components. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
The package structure for a semiconductor chip in the present embodiment can be used for various semiconductor chips, for example, the following semiconductor chips are provided in the present embodiment, and the package structure for a semiconductor chip in the present embodiment can be used for the following semiconductor chips.
A semiconductor chip comprises a heat radiation body, an electronic component arranged inside the heat radiation body and a pin which is connected with the electronic component and exposed out of the heat radiation body, wherein the electronic component comprises a diode and a transistor, and the lower surface of the heat radiation body corresponding to the diode and the transistor is provided with an upwards convex concave surface. The utility model has the beneficial effects that: the lower surfaces of the heat radiators corresponding to the diode and the transistor are concave surfaces protruding upwards, so that the diode and the transistor have better heat radiation performance; the mold flow direction can be changed, and the risk of air holes and pin holes on the back surface colloid is reduced. In particular, the diode is configured as a fast recovery diode. A fast recovery diode (FRD for short) is a semiconductor diode having characteristics of good switching characteristics and short reverse recovery time. Specifically, the transistor is provided as an insulated gate bipolar transistor. An insulated-Gate Bipolar Transistor (IGBT) combines the advantages of a Power Transistor (Giant Transistor-GTR) and a Power field effect Transistor (Power MOSFET), and has excellent characteristics. Specifically, the electronic component further comprises a thermistor, a drive IC chip and a PCB. The electronic components are connected to each other by metal wires. Specifically, the radiator is prepared and formed by epoxy plastic package materials. Epoxy Molding compounds (EMC-Epoxy Molding Compound), namely Epoxy Molding Compound and Epoxy Molding Compound, are powdery Molding compounds prepared by mixing Epoxy resin serving as matrix resin, high-performance phenolic resin serving as a curing agent, silicon micro powder and the like serving as fillers and a plurality of additives. More than 95% of plastic packaging (plastic packaging for short) materials adopt EMC, the plastic packaging process is to extrude the EMC into a die cavity by a transfer molding method, and embed a semiconductor chip therein, and simultaneously, the EMC is crosslinked, cured and molded to form the semiconductor device with a certain structural shape.
Of course, the present embodiment can also be applied to semiconductor chips having other structures. Here, a description is not repeated, and the package structure for a semiconductor chip according to the embodiment of the present application is described below.
Referring to fig. 1-3, a package structure for a semiconductor chip includes a first housing 1, a second housing and a silicon substrate 9, wherein a heat dissipation mechanism is fixedly mounted on the top of the silicon substrate 9, and the bottoms of the silicon substrate 9 and the heat dissipation mechanism are both fixedly wrapped inside the first housing 1; second casing fixed mounting is in the bottom of first shell 1, silicon-based body 9 is connected with a plurality of conductive posts 5, it runs through the bottom of second shell 2 to lead electrical post 5, has add heat dissipation mechanism, is convenient for carry out the heat dissipation of top surface position department, and the thermal effluence of being convenient for has improved holistic result of use, and holistic radiating effect is better, has sufficient heat radiating area, has improved radiating effect.
The heat dissipation mechanism comprises a ceramic heat conduction sleeve 3 and a heat dissipation silica gel sheet 8, the ceramic heat conduction sleeve 3 is wrapped on the upper portion of the silicon substrate body 9, the heat dissipation silica gel sheet 8 is filled between the ceramic heat conduction sleeve 3 and the silicon substrate body 9, a good heat dissipation effect is achieved, the heat dissipation silica gel sheet 8 is filled, the contact effect is improved, heat conduction and heat dissipation are achieved through convenient heat transfer, flexibility is achieved, and a certain shock absorption effect is achieved.
The ceramic heat conduction sleeve is characterized in that the heat radiating fins 4 are arranged at the top of the ceramic heat conduction sleeve 3, the number of the heat radiating fins 4 is a plurality of, the heat radiating fins 4 are distributed at equal intervals, the heat radiating fins 4 improve the heat radiating area of the ceramic heat conduction sleeve 3, the ceramic heat conduction sleeve 3 and the heat radiating fins 4 are of an integral structure, and the heat radiating fins 4 are formed by milling.
A plurality of equidistant tapered grooves 12 that distribute are all seted up to ceramic heat conduction cover 3's both sides, tapered grooves 12 are the toper structure, are convenient for encapsulate fixedly with first shell 1.
A plurality of convex parts 10 are evenly arranged at the top of the heat dissipation silica gel sheet 8, the convex parts 10 are connected with the concave grooves 11 arranged on the inner wall of the ceramic heat conduction sleeve 3 in an embedded mode, the contact area between the convex parts and the concave grooves is increased, and heat transfer is facilitated.
A chip electrode 14 is arranged inside the second shell 2, and the chip electrode 14 is connected with the silicon substrate body 9 through a connecting column 13; the connecting column 13 penetrates through the wall of the bottom part of the first shell 1, and the connecting column 13 is fixedly connected with the first shell 1; the chip electrode 14 is connected with the conductive column 5, and the conductive column 5 is fixedly installed at the bottom of the second housing 2; and a metal conducting strip is connected between the conducting column 5 and the chip electrode 14 and is used for being connected with the outside to provide a pin structure.
The fixed bonding in bottom of second shell 2 has lower cushion 6, a plurality of deformation hole 7 has been seted up to lower cushion 6's inside equidistant, installs the back, for the bottom provides flexible support, provides the support of bottom when installing, has better bearing and absorbing effect.
The using method comprises the following steps: whole semiconductor chip's packaging structure is when using, through first shell 1 to ceramic heat conduction cover 3, heat dissipation silica gel piece 8 and silica-based body 9 encapsulate, protect, silica-based body 9 uses the heat that produces, transmit ceramic heat conduction cover 3 through heat dissipation silica gel piece 8 on, dispel the heat through ceramic heat conduction cover 3 and fin 4, very big improvement radiating area, the thermal effluvium of being convenient for, fill through heat dissipation silica gel piece 8, the heat transfer, be convenient for thermal heat conduction, the heat dissipation, further convex part 10 and recess 11 have, the area of heat conduction has been improved, thereby be convenient for carry out heat conduction, the heat dissipation, excellent in use effect.
The application has the advantages that:
compared with the prior art, the packaging structure of the whole semiconductor chip is additionally provided with the heat dissipation mechanism, so that heat dissipation of the top surface position is facilitated, the heat dissipation is facilitated, the integral using effect is improved, the integral heat dissipation effect is good, the enough heat dissipation area is provided, and the heat dissipation effect is improved.
It is well within the skill of those in the art to implement, without undue experimentation, the present application is not directed to software and process improvements, as they relate to circuits and electronic components and modules.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A package structure for a semiconductor chip, characterized by: the silicon substrate comprises a first shell (1), a second shell and a silicon substrate body (9), wherein a heat dissipation mechanism is fixedly mounted at the top of the silicon substrate body (9), and the bottoms of the silicon substrate body (9) and the heat dissipation mechanism are fixedly wrapped in the first shell (1); the second shell is fixedly installed at the bottom of the first shell (1), the silicon-based body (9) is connected with a plurality of conductive columns (5), and the conductive columns (5) penetrate through the bottom of the second shell (2).
2. The package structure for semiconductor chips of claim 1, wherein: the heat dissipation mechanism comprises a ceramic heat conduction sleeve (3) and a heat dissipation silica gel sheet (8), the ceramic heat conduction sleeve (3) wraps the upper portion of the silicon-based body (9), and the heat dissipation silica gel sheet (8) is filled between the ceramic heat conduction sleeve (3) and the silicon-based body (9).
3. The package structure for semiconductor chips as defined in claim 2, wherein: the ceramic heat conduction sleeve is characterized in that radiating fins (4) are arranged at the top of the ceramic heat conduction sleeve (3), the number of the radiating fins (4) is a plurality, and the plurality of radiating fins (4) are distributed at equal intervals.
4. The package structure for semiconductor chips as defined in claim 2, wherein: a plurality of tapered grooves (12) distributed at equal intervals are formed in the two sides of the ceramic heat conduction sleeve (3), and the tapered grooves (12) are of tapered structures.
5. The package structure for semiconductor chips as defined in claim 2, wherein: a plurality of convex parts (10) are uniformly arranged at the top of the heat dissipation silica gel sheet (8), and the convex parts (10) are connected with a groove (11) arranged on the inner wall of the ceramic heat conduction sleeve (3) in an embedded mode.
6. The package structure for semiconductor chips of claim 1, wherein: the chip electrode (14) is arranged inside the second shell (2), and the chip electrode (14) is connected with the silicon-based body (9) through a connecting column (13).
7. The package structure for semiconductor chips as defined in claim 6, wherein: the connecting column (13) penetrates through the wall of the bottom shell of the first shell (1), and the connecting column (13) is fixedly connected with the first shell (1).
8. The package structure for semiconductor chips as defined in claim 6, wherein: the chip electrode (14) is connected with the conductive column (5), and the conductive column (5) is fixedly arranged at the bottom of the second shell (2).
9. The package structure for semiconductor chips of claim 1, wherein: and a metal conducting strip is connected between the conducting column (5) and the chip electrode (14).
10. The package structure for semiconductor chips of claim 1, wherein: the bottom of second shell (2) is fixed to bond has lower cushion (6), a plurality of deformation hole (7) have been seted up to the inside equidistant of lower cushion (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121567924.1U CN215377395U (en) | 2021-07-09 | 2021-07-09 | Packaging structure for semiconductor chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121567924.1U CN215377395U (en) | 2021-07-09 | 2021-07-09 | Packaging structure for semiconductor chip |
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| Publication Number | Publication Date |
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| CN215377395U true CN215377395U (en) | 2021-12-31 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114864517A (en) * | 2022-04-21 | 2022-08-05 | 中山市木林森微电子有限公司 | Packaging structure for semiconductor device |
| CN117199016A (en) * | 2023-11-06 | 2023-12-08 | 上海威固信息技术股份有限公司 | Optoelectronic semiconductor chip structure and method for producing the same |
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2021
- 2021-07-09 CN CN202121567924.1U patent/CN215377395U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114864517A (en) * | 2022-04-21 | 2022-08-05 | 中山市木林森微电子有限公司 | Packaging structure for semiconductor device |
| CN114864517B (en) * | 2022-04-21 | 2022-12-09 | 中山市木林森微电子有限公司 | Packaging structure for semiconductor device |
| CN117199016A (en) * | 2023-11-06 | 2023-12-08 | 上海威固信息技术股份有限公司 | Optoelectronic semiconductor chip structure and method for producing the same |
| CN117199016B (en) * | 2023-11-06 | 2024-01-23 | 上海威固信息技术股份有限公司 | Optoelectronic semiconductor chip structure and method for producing the same |
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