CN208923199U - A kind of envelope examining system of semiconductor indium antimonide hall device - Google Patents
A kind of envelope examining system of semiconductor indium antimonide hall device Download PDFInfo
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- CN208923199U CN208923199U CN201821879005.6U CN201821879005U CN208923199U CN 208923199 U CN208923199 U CN 208923199U CN 201821879005 U CN201821879005 U CN 201821879005U CN 208923199 U CN208923199 U CN 208923199U
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- lead frame
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- circular hole
- envelope
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Abstract
The utility model discloses a kind of envelope examining systems of semiconductor indium antimonide hall device, including upper lead frame, leadframes unit and frame, two line lead frame units are provided on the upper lead frame, and each line lead frame unit is equidistantly provided with eight groups, middle muscle is provided between every group of leadframes unit of described same a line and adjacent one group of leadframes unit, the left and right ends of the upper lead frame are provided with heat dissipation frame, and the outer edge of upper lead frame is provided with frame.The envelope examining system of the semiconductor indium antimonide hall device; more reasonable, the join domain between secured leadframes unit is arranged in overall structure, and the location hole for facilitating positioning is arranged; precise positioning; chip alignment is placed, while more wear-resisting antiknock is arranged, thins piece and is not bent, and has better protective action; protect intermediate region structure not easily damaged; it is more practical durable, cost is saved, Production Gain is improved.
Description
Technical field
The utility model relates to semiconductor packages manufacturing technology field, specially a kind of semiconductor indium antimonide hall device
Seal examining system.
Background technique
Chip carrier of the lead frame as integrated circuit is a kind of real by means of bonding material (spun gold, aluminium wire, copper wire)
The electrical connection of existing chip internal circuits exit and outer lead, forms the key structure part of electric loop, it is played and outside
The function served as bridge of portion's conducting wire connection requires in most semiconductor integrated blocks using lead frame, is that electronic information produces
The lead frame of important basic material in industry, the prior art more produces product patterns to pursue, on lead frame almost
It is covered with leadframes unit, on the one hand each leadframes unit is difficult to hold and can all be positioned to for the positioning of chip
Function, while the part that each leadframes unit is connected and fixed is almost very thin, during usage, is easier to damage
It is bad, cause entire lead frame that cannot all reuse, waste production cost, expends resource.
In order to solve defect present in lead frame set forth above and deficiency, it is badly in need of improving the skill of lead frame
Art, the join domain between secured leadframes unit, and the location hole for facilitating positioning is set, and precise positioning, chip alignment
It places, it is more practical durable, cost is saved, Production Gain is improved, to provide a kind of envelope of semiconductor indium antimonide hall device
Examining system.
Utility model content
The technical issues of the utility model solves is to overcome the lead frame of the prior art to pursue and more produce
Mode is almost covered with leadframes unit on lead frame, and on the one hand each leadframes unit is difficult to the positioning of chip
Assurance can all position success, while the part that each leadframes unit is connected and fixed is almost very thin, is using
Cheng Dangzhong is easier to damage, and causes entire lead frame that cannot all reuse, and wastes production cost, expends the defect of resource,
A kind of envelope examining system of semiconductor indium antimonide hall device is provided.A kind of envelope examining system of the semiconductor indium antimonide hall device
With the join domain between secured leadframes unit, and the location hole for facilitating positioning is set, precise positioning, chip alignment
It places, it is more practical durable, the features such as saving cost, improve Production Gain.
To achieve the above object, the utility model provides the following technical solutions: a kind of semiconductor indium antimonide hall device
Examining system, including upper lead frame, connecting plate and lower lead frame are sealed, is arranged between the upper lead frame and lower lead frame
There is a connecting plate, and upper lead frame is respectively provided with consistent with material, the structure on lower lead frame, is arranged on the upper lead frame
There are two line lead frame units, and each line lead frame unit is equidistantly provided with eight groups, every group of lead of described same a line
Middle muscle is provided between frame unit and adjacent one group of leadframes unit, the left and right ends of the upper lead frame are respectively provided with
There is heat dissipation frame, and the outer edge of upper lead frame is provided with frame.
Preferably, the leadframes unit includes chip bearing area, pin, location hole, pin outline border and chip, and
The center of leadframes unit is set as chip bearing area, chip is carried in chip bearing area, chip bearing area is peripherally installed with
There is pin, four sides of pin are provided with pin outline border, while offering location hole on four apex angles of leadframes unit,
Leadframes unit setting is careful rationally, and peripheral four apex angles are provided with location hole, facilitates confirmation position, for chip positioning
More precisely.
Preferably, the middle muscle is between two groups of adjacent leadframes units, and middle muscle is two adjacent groups lead frame
The line of symmetry of frame unit, basic structure setting rationally, is symmetrical set, opens between equidistant, regular to be produced.
Preferably, two group of first circular hole, and two group of first circle are offered above and below the leadframes unit
Hole is symmetrical arranged about the middle line of leadframes unit.
Preferably, the top edge of the upper lead frame equidistantly offers the second circular hole of multiple groups, and in upper lead frame
Portion and lower edge margin equidistantly offer the second circular hole of multiple groups, at the same upper lead frame top edge the second circular hole of two adjacent groups it
Between spacing be less than in the middle part of upper lead frame the spacing between the second circular hole of lower edge two adjacent groups, opening up circular hole is in order to certain
Heat dissipation setting is carried out in degree, another convenience can also be saved using material, save production cost, have certain economic benefit.
Preferably, the frame uses chromium-copper material, and frame surrounds the interior zone of lead frame using wolfram steel
Material, the thermal conductivity of chromium-copper is fine, hardness is high, wear-resisting antiknock, the production for being usually used in conducting block, thins piece and is not bent,
It can be good at being protected, wolfram steel material has the advantages that high hardness, wear-resisting, intensity and toughness are preferable, heat-resisting, corrosion resistant.
Preferably, leadframes unit, the first circular hole, the second circular hole and the middle muscle on the upper lead frame are above draws
The middle line of wire frame is axis into upper and lower central symmetry, and leadframes unit, the first circular hole, the second circular hole and middle muscle are right
Title is provided with multiple groups, while middle line bilateral symmetry of the frame about upper lead frame that radiate, the setting of symmetrical structure, so that whole
Structure is more regular, and production model is simple and convenient, is less prone to fault, improves production efficiency.
Compared with prior art, the utility model has the beneficial effects that the envelope of the semiconductor indium antimonide hall device surveys system
System, more reasonable, the join domain between secured leadframes unit is arranged in overall structure, and the positioning for facilitating positioning is arranged
Hole, precise positioning, chip alignment are placed, while more wear-resisting antiknock is arranged, thins piece and is not bent, and there is preferably protection to make
With, protect intermediate region structure not easily damaged, it is more practical durable, cost is saved, Production Gain is improved.
Detailed description of the invention
Fig. 1 is the upper lead frame schematic elevation view of the utility model structure；
Fig. 2 is connection schematic diagram between the upper lead frame and lower lead frame of the utility model structure；
Fig. 3 is the leadframes unit structural schematic diagram of the utility model structure.
Figure label: 1, upper lead frame, 2, leadframes unit, 20, chip bearing area, 21, pin, 22, location hole,
23, pin outline border, 24, chip, the 3, first circular hole, the 4, second circular hole, 5, middle muscle, 6, heat dissipation frame, 7, frame, 8, connecting plate,
9, lower lead frame.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
Fig. 1-3 is please referred to, the utility model provides a kind of technical solution: a kind of envelope survey of semiconductor indium antimonide hall device
System, including upper lead frame 1, leadframes unit 2, chip bearing area 20, pin 21, location hole 22, pin outline border 23,
Chip 24, the first circular hole 3, the second circular hole 4, middle muscle 5, heat dissipation frame 6, frame 7, connecting plate 8 and lower lead frame 9, upper lead
It is provided with connecting plate 8 between frame 1 and lower lead frame 9, and upper lead frame 1 and material, structure on lower lead frame 9 are equal
Setting is consistent, two line lead frame units 2 is provided on upper lead frame 1, and each line lead frame unit 2 is placed equidistant with
There are eight groups, is provided with middle muscle 5 between every group of leadframes unit 2 and adjacent one group of leadframes unit 2 of a line, above draws
The left and right ends of wire frame 1 are provided with heat dissipation frame 6, and the outer edge of upper lead frame 1 is provided with frame 7.
Such as Fig. 3, leadframes unit 2 includes chip bearing area 20, pin 21, location hole 22, pin outline border 23 and core
Piece 24, and the center of leadframes unit 2 is set as chip bearing area 20, chip 24 being carried in chip bearing area 20, chip is held
Carry area 20 has been peripherally installed with pin 21, and four sides of pin 21 are provided with pin outline border 23, while the four of leadframes unit 2
Location hole 22 is offered on a apex angle, leadframes unit setting is careful rationally, and peripheral four apex angles are provided with location hole,
Facilitate confirmation position, it is more accurate for chip positioning.
Such as Fig. 1, middle muscle 5 is between two groups of adjacent leadframes units 2, and middle muscle 5 is two adjacent groups lead frame
The line of symmetry of unit 2, basic structure setting rationally, are symmetrical set, open between equidistant, regular to be produced, lead frame
Two group of first circular hole 3 is offered above and below frame unit 2, and two group of first circular hole 3 is about in leadframes unit 2
Line is symmetrical arranged.
Such as Fig. 1, the top edge of upper lead frame 1 equidistantly offers the second circular hole of multiple groups 4, and the middle part of upper lead frame 1
The second circular hole of multiple groups 4, while 1 the second circular hole of top edge two adjacent groups 4 of upper lead frame are equidistantly offered with lower edge margin
Between spacing be less than spacing between 1 middle part of upper lead frame and the second circular hole of lower edge two adjacent groups 4, open up circular hole be in order to
Heat dissipation setting is carried out to a certain extent, and another convenience can also be saved using material, save production cost, have certain economic effect
Benefit.
Frame 7 uses chromium-copper material, and frame 7 surrounds the interior zone of lead frame 1 using wolfram steel material, chromium-copper
Thermal conductivity it is fine, hardness is high, wear-resisting antiknock, the production for being usually used in conducting block, big thin slice is not bent, can be good at
It is protected, wolfram steel material has the advantages that high hardness, wear-resisting, intensity and toughness are preferable, heat-resisting, corrosion resistant.
Leadframes unit 2,5 or more lead of the first circular hole 3, the second circular hole 4 and middle muscle such as Fig. 1, on upper lead frame 1
The middle line of frame 1 is axis into upper and lower central symmetry, and leadframes unit 2, the first circular hole 3, the second circular hole 4 and middle muscle 5
Multiple groups are symmetrically arranged with, while middle line bilateral symmetry of the frame 6 about upper lead frame 1 that radiate, the setting of symmetrical structure make
Overall structure is more regular, production model is simple and convenient, is less prone to fault, raising production efficiency.
Working principle: when using the envelope examining system of the semiconductor indium antimonide hall device, when starting encapsulation, upper
Tin cream is coated in the chip bearing area 20 in leadframes unit 2 in lead frame 1, chip 24 is pasted on tin cream, and
Lower lead frame 9 is turned and is pressed together on upper lead frame 1 so that the chip bearing area 20 on upper lead frame 1 with
Chip bearing area 20 on lower lead frame 9 is corresponding one by one, obtains half using sintering, plastic packaging, plating and separation program
Conductor indium antimonide hall device, this production method can once encapsulate 16 semiconductor indium antimonide hall devices, encapsulate
Product quality consistency is good, process, and the stronger wear-resistant high temperature resistant of package system, use is more permanent, reduces cost
Loss improves product quality, improves income, here it is this working principles.
While there has been shown and described that the embodiments of the present invention, for the ordinary skill in the art,
It is understood that these embodiments can be carried out with a variety of variations in the case where not departing from the principles of the present invention and spirit, repaired
Change, replacement and variant, the scope of the utility model is defined by the appended claims and the equivalents thereof.
Claims (7)
1. a kind of envelope examining system of semiconductor indium antimonide hall device, including upper lead frame (1), connecting plate (8) and lower lead
Frame (9), it is characterised in that: be provided with connecting plate (8) between the upper lead frame (1) and lower lead frame (9), and on draw
Wire frame (1) is respectively provided with consistent with material, the structure on lower lead frame (9), is provided with two rows on the upper lead frame (1)
Leadframes unit (2), and each line lead frame unit (2) is equidistantly provided with eight groups, every group of lead of described same a line
It is provided with middle muscle (5) between frame unit (2) and adjacent one group of leadframes unit (2), a left side for the upper lead frame (1)
Right both ends are provided with heat dissipation frame (6), and the outer edge of upper lead frame (1) is provided with frame (7).
2. a kind of envelope examining system of semiconductor indium antimonide hall device according to claim 1, it is characterised in that: described to draw
Wire frame unit (2) includes chip bearing area (20), pin (21), location hole (22), pin outline border (23) and chip (24),
And the center of leadframes unit (2) is set as chip bearing area (20), and chip (24), chip are carried on chip bearing area (20)
Supporting region (20) has been peripherally installed with pin (21), and four sides of pin (21) are provided with pin outline border (23), while lead frame
Location hole (22) are offered on four apex angles of frame unit (2).
3. a kind of envelope examining system of semiconductor indium antimonide hall device according to claim 1, it is characterised in that: in described
Muscle (5) is between two groups of adjacent leadframes units (2), and middle muscle (5) is pair of two adjacent groups leadframes unit (2)
Claim line.
4. a kind of envelope examining system of semiconductor indium antimonide hall device according to claim 1, it is characterised in that: described to draw
Two group of first circular hole (3) is offered above and below wire frame unit (2), and two group of first circular hole (3) is about lead frame
The middle line of frame unit (2) is symmetrical arranged.
5. a kind of envelope examining system of semiconductor indium antimonide hall device according to claim 1, it is characterised in that: on described
The top edge of lead frame (1) equidistantly offers the second circular hole of multiple groups (4), and the middle part and lower edge area of upper lead frame (1)
Domain equidistantly offers the second circular hole of multiple groups (4), while between upper lead frame (1) top edge the second circular hole of two adjacent groups (4)
Spacing is less than in the middle part of upper lead frame (1) spacing between the second circular hole of lower edge two adjacent groups (4).
6. a kind of envelope examining system of semiconductor indium antimonide hall device according to claim 1, it is characterised in that: the side
Frame (7) uses chromium-copper material, and frame (7) surrounds the interior zone of lead frame (1) using wolfram steel material.
7. a kind of envelope examining system of semiconductor indium antimonide hall device according to claim 1, it is characterised in that: on described
Leadframes unit (2), the first circular hole (3), the second circular hole (4) and middle muscle (5) above lead frame on lead frame (1)
(1) middle line is axis into upper and lower central symmetry, and leadframes unit (2), the first circular hole (3), the second circular hole (4) and in
Muscle (5) is symmetrically arranged with multiple groups, while middle line bilateral symmetry of the frame that radiates (6) about upper lead frame (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821879005.6U CN208923199U (en) | 2018-11-15 | 2018-11-15 | A kind of envelope examining system of semiconductor indium antimonide hall device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821879005.6U CN208923199U (en) | 2018-11-15 | 2018-11-15 | A kind of envelope examining system of semiconductor indium antimonide hall device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208923199U true CN208923199U (en) | 2019-05-31 |
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ID=66711976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821879005.6U Active CN208923199U (en) | 2018-11-15 | 2018-11-15 | A kind of envelope examining system of semiconductor indium antimonide hall device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208923199U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113628977A (en) * | 2021-06-21 | 2021-11-09 | 江西万年芯微电子有限公司 | Frame and copper sheet device packaging design method |
-
2018
- 2018-11-15 CN CN201821879005.6U patent/CN208923199U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113628977A (en) * | 2021-06-21 | 2021-11-09 | 江西万年芯微电子有限公司 | Frame and copper sheet device packaging design method |
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