CN207367964U - Array of lead frames and packaging body - Google Patents
Array of lead frames and packaging body Download PDFInfo
- Publication number
- CN207367964U CN207367964U CN201721476897.0U CN201721476897U CN207367964U CN 207367964 U CN207367964 U CN 207367964U CN 201721476897 U CN201721476897 U CN 201721476897U CN 207367964 U CN207367964 U CN 207367964U
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- CN
- China
- Prior art keywords
- pin
- dao
- lead frame
- chip
- type
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model provides a kind of array of lead frames and packaging body.The array of lead frames includes multiple lead frames, it is characterized in that, each lead frame includes one and is used to place first kind pin and at least three Second Type pins that with the chip metal lead wire can be used to be connected that at least Ji Dao of a chip, one and the Ji Dao are connected, the first kind pin is arranged on the same side of the Ji Dao with the part Second Type pin, Second Type pin described in another part is arranged on the opposite side of the Ji Dao, and the width of the first kind pin is more than the width of the Second Type pin.The utility model has the advantage of relative to the product of equal heat dissipation performance, the utility model packaging body small product size is small, reduces packaging cost, and improves the reliability of product, realizes the miniaturization of packaging body.
Description
Technical field
It the utility model is related to field of semiconductor package, more particularly to a kind of array of lead frames and packaging body.
Background technology
As country fosters semicon industry energetically, Integrated circuit IC process industry is developed rapidly.Encapsulation is whole
An important ring in a ic manufacturing process, it has heat dissipation and defencive function, chip is sealed, and completely cuts off outside contamination and outer
Destruction of the power to chip.The encapsulation of patch type has many advantages such as encapsulation volume is small, cost is low, production efficiency is high, obtains
The welcome of terminal client.For this reason, the substantial amounts of patch type encapsulating structure of each encapsulation factory independent development, such as SOP, SOT,
DFN, QFN, CPC etc..
With advances in technology, the product use environment increasingly limit, while client is more and more sensitive to cost, it is traditional
Patch type encapsulation slowly exposes problems, for example little Ji islands frame can put that chip area is small, and heat dissipation performance is bad；Big base
Island frame is excessive, and cost performance is not high, or even reflow soldering Hou Ji islands are easily layered, and security risk occur.
Therefore, there is an urgent need for a kind of new array of lead frames and packaging body come overcome existing product there are the shortcomings that.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of array of lead frames and packaging body, its is small,
Packaging cost is low, and reliability is high.
To solve the above-mentioned problems, the utility model provides a kind of array of lead frames, including multiple lead frames, often
One lead frame includes one and is used to placing the first kind pin that is connected of at least Ji Dao of a chip, one and the Ji Dao and at least
Three can use the Second Type pins that be connected of metal lead wire with the chip, the first kind pin and part described the
Two type pins are arranged on the same side of the Ji Dao, and Second Type pin is arranged on the another of the Ji Dao described in another part
Side, the width of the first kind pin are more than the width of the Second Type pin.
In one embodiment, the width range of the first kind pin is 0.76mm~0.85mm.
In one embodiment, the Ji Dao relative to the pin of the first kind to lower recess.
In one embodiment, the junction of the Ji Dao and the first kind pin have an inclined plane, the inclination
The scope at the inclination angle in face is 50~70 degree.
In one embodiment, each lead frame has a packaging area, in the packaging area, the lead frame
Surface all covers silver coating, or the part surface of the lead frame has bar shaped silver coating.
The utility model also provides a kind of packaging body, including lead frame described in a lead frame, at least a chip and plastic packaging
The plastic-sealed body of frame and the chip；The lead frame is including Ji Dao, one and the Ji Dao first kind pin being connected and extremely
The few three Second Type pins that with the chip metal lead wire can be used be connected, described in the first kind pin and part
Second Type pin is arranged on the same side of the Ji Dao, and Second Type pin is arranged on the another of the Ji Dao described in another part
Side, the width of the first kind pin are more than the width of the Second Type pin；The chip is arranged on the Ji Dao
On, the Second Type pin is connected with the chip by metal lead wire；The first kind pin and the Second Type
Pin protrudes from the plastic-sealed body.
In one embodiment, the width range of the first kind pin is 0.76mm~0.85mm.
In one embodiment, the Ji Dao relative to the pin of the first kind to lower recess.
In one embodiment, the junction of the Ji Dao and the first kind pin have an inclined plane, the inclination
The scope at the inclination angle in face is 50~70 degree.
In one embodiment, in the plastic-sealed body plastic packaging region, the lead frame surface all covers silver coating, or
The part surface of lead frame described in person has bar shaped silver coating.
The utility model has the advantage of relative to the product of equal heat dissipation performance, the utility model packaging body product body
Product is small, reduces packaging cost, realizes the miniaturization of packaging body, relative to the packaging body of equal volume, its heat dissipation performance is significantly
Improve, product reliability greatly improves.
Brief description of the drawings
Fig. 1 is the dimensional structure diagram of a lead frame of the utility model array of lead frames；
Fig. 2 is the planar structure schematic diagram of a lead frame of the utility model array of lead frames；
Fig. 3 be along Fig. 2 A-A to profile；
Fig. 4 A are the overlooking the structure diagrams of the utility model packaging body；
Fig. 4 B are the side schematic views of the utility model packaging body；
Fig. 5 is the dimensional structure diagram of the utility model packaging body.
Embodiment
The embodiment of array of lead frames provided by the utility model and packaging body is done in detail below in conjunction with the accompanying drawings
Describe in detail bright.
The utility model array of lead frames includes multiple lead frames 10.Fig. 1 is the three-dimensional knot of a lead frame 10
Structure schematic diagram, Fig. 2 are the planar structure schematic diagrams of a lead frame 10.Refer to shown in Fig. 1 and Fig. 2, the utility model one
A lead frame 10 can form an independent packaging body (being shown in chip 20 in Fig. 5) after plastic packaging.The lead frame
Frame 10 includes a base island 11,12 and at least three Second Type pin 13 of at least one first kind pin.The first kind
Pin 12 is arranged on the same side on the base island 11 with the part Second Type pin 13, and Second Type described in another part draws
Foot 13 is arranged on the opposite side on the base island 11.In this embodiment, a first kind is schematically shown to draw
Foot 12 and three Second Type pins 13, wherein, a Second Type pin 13 and a first kind pin 12 are arranged on institute
The same side on Shu Ji islands 11, two other Second Type pin 13 are arranged on the opposite side on the base island 11.
At least one chip can be placed on the surface on the base island 11.For multi-chip package, the table on the base island 11
Face can place two chips, even three chips, four chips.The first kind pin 12 is connected with the base island 11,
Its main heat dissipation pin as the base island 11.The Second Type pin 13 is not directly connected to the base island 11, it can
It is connected with the chip being arranged on base island 11 using metal lead wire 21 (being shown in Fig. 5), 13 conduct of Second Type pin
The functional leads of follow-up packaging body are electrically connected with the external world.
Wherein, the width of the first kind pin 12 is more than the width of the Second Type pin 13.Preferably, it is described
The width range of first kind pin 12 is 0.76mm~0.85mm, for example, 0.78mm, 0.80mm, 0.82mm etc..In this practicality
In new, the wider width of the first kind pin 12, is outwards radiated which raises the packaging body after plastic packaging by pin
Performance.
Fig. 3 be along Fig. 2 A-A to profile.Shown in Figure 3, the base island 11 is relative to the first kind
Pin 12 is to lower recess.I.e. in the lead frame 10, the base island 11 sinks relative to the outline border of lead frame 10, is formed
Depressed structure, this kind of depressed structure can reduce the volume shared by chip after plastic packaging, and then further reduce the body of packaging body
Product, realizes the miniaturization of packaging body.
Continuing with shown in Figure 3, the base island 11 and the junction of the first kind pin 12 have an inclined plane
14, the inclined plane 14 has a tiltangleθ, and the tiltangleθ refers to the angle of inclined plane 14 and horizontal plane.The inclination
The scope of angle θ is 50~70 degree, be the advantage is that, on the premise of the pin of lead frame 10 and the width of outline border are constant, contracting
Width shared by the projection H of small inclined plane 14, can increase the area in chip placement region on the base island 11, for example, increase
Chip placement region afterwards can the size of chip placement can reach 1.507mm*2.057mm, the i.e. lead frame in same area
In frame 10, increase can chip placement area, substantially increase the heat dissipation performance of the packaging body using this kind of lead frame.
Further, continuing with shown in Figure 2, each lead frame 10 has a packaging area 15, in fig. 2 using void
Line schematically indicates the scope of packaging area 15.The packaging area 15 refers to that the lead frame 10 is subsequently encapsulating
The region encapsulated in technique by plastic-sealed body.In the present embodiment, the part surface of the lead frame 10 has bar shaped silver coating
15, for example, there is bar shaped plating on the position of first kind pin 12 and Second Type pin 13 in the lead frame 10
Silver layer 16, the advantage is that, greatly reduce silver-plated region, add the bonding force of plastic-sealed body and lead frame in follow-up encapsulation,
The probability of layering is reduced, reduces the risk of reliability.Further, in another embodiment, in the packaging area 15, institute
10 surface of lead frame all covering silver coatings 16 are stated, it being capable of compatible more chip routing distributions.
The utility model also provides a kind of packaging body.Fig. 4 A are the overlooking the structure diagrams of the utility model packaging body, figure
4B is the side schematic view of the utility model packaging body, and Fig. 5 is the dimensional structure diagram of the utility model packaging body, wherein,
In Figure 5, the structure of the lead frame inside plastic-sealed body 30 is also shown out.Refer to shown in Fig. 4 A, Fig. 4 B and Fig. 5, it is described
Packaging body includes the plastic-sealed body of lead frame 10 and the chip 20 described in a lead frame 10, at least a chip 20 and plastic packaging
30.The structure of the lead frame 10 is identical with the structure of previously described lead frame, repeats no more.Wherein, the chip
20 are arranged on the base island 11, and the Second Type pin 13 is connected by metal lead wire 21 with the chip 20, and described
One type pins 12 and the Second Type pin 13 protrude from the plastic-sealed body 30, and the plastic-sealed body 30 is along the lead frame
10 packaging area 15 encapsulates the lead frame 10 and the chip 20.
The utility model packaging body solves the problems, such as can currently to put chip area small, and packaging body is also greatly improved
The performance outwardly to be radiated by pin, relative to the packaging body of equal volume, its heat dissipation performance greatly improves, product reliability
Greatly improve.The utility model packaging body heat dissipation performance is close to SOP-8 type package bodies, but the body of the utility model packaging body
Product only has 1/3rd of the volume of SOP-8 type package bodies, greatly reduces packaging cost, realizes the miniaturization of packaging body.
The above is only the preferred embodiment of the utility model, it is noted that for the common skill of the art
Art personnel, on the premise of the utility model principle is not departed from, can also make some improvements and modifications, these improvements and modifications
Also it should be regarded as the scope of protection of the utility model.
Claims (10)
1. a kind of array of lead frames, including multiple lead frames, it is characterised in that each lead frame includes one and is used to place
The first kind pin and at least three that at least Ji Dao of a chip, one and the Ji Dao are connected can be with the chips using gold
Belong to the Second Type pin of lead connection, the first kind pin is arranged on the Ji Dao with the part Second Type pin
The same side, Second Type pin described in another part is arranged on the opposite side of the Ji Dao, the width of the first kind pin
Width of the degree more than the Second Type pin.
2. array of lead frames according to claim 1, it is characterised in that the width range of the first kind pin is
0.76mm~0.85mm.
3. array of lead frames according to claim 1, it is characterised in that the Ji Dao is relative to the first kind
Pin is to lower recess.
4. array of lead frames according to claim 3, it is characterised in that the Ji Dao and the first kind pin
Junction has an inclined plane, and the scope at the inclination angle of the inclined plane is 50~70 degree.
5. array of lead frames according to claim 1, it is characterised in that each lead frame has a packaging area,
In the packaging area, the lead frame surface all covering silver coatings, or the part surface tool of the lead frame
There is bar shaped silver coating.
6. a kind of packaging body, it is characterised in that including lead frame described in a lead frame, at least a chip and plastic packaging and described
The plastic-sealed body of chip；The lead frame includes the first kind pin and at least three energy that Ji Dao, one and the Ji Dao are connected
Enough Second Type pins for using metal lead wire to be connected with the chip, the first kind pin and the part Second Type
Pin is arranged on the same side of the Ji Dao, and Second Type pin described in another part is arranged on the opposite side of the Ji Dao, institute
The width for stating first kind pin is more than the width of the Second Type pin；The chip is arranged on the Ji Dao, described
Second Type pin is connected with the chip by metal lead wire；The first kind pin and the Second Type pin protrude
In the plastic-sealed body.
7. packaging body according to claim 6, it is characterised in that the width range of the first kind pin is 0.76mm
~0.85mm.
8. packaging body according to claim 6, it is characterised in that the Ji Dao relative to the first kind pin to
Lower recess.
9. packaging body according to claim 8, it is characterised in that the junction of the Ji Dao and the first kind pin
With an inclined plane, the scope at the inclination angle of the inclined plane is 50~70 degree.
10. packaging body according to claim 6, it is characterised in that in the plastic-sealed body plastic packaging region, the lead frame
Frame surface all covers silver coating, or the part surface of the lead frame has bar shaped silver coating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721476897.0U CN207367964U (en) | 2017-11-08 | 2017-11-08 | Array of lead frames and packaging body |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721476897.0U CN207367964U (en) | 2017-11-08 | 2017-11-08 | Array of lead frames and packaging body |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207367964U true CN207367964U (en) | 2018-05-15 |
Family
ID=62345715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721476897.0U Active CN207367964U (en) | 2017-11-08 | 2017-11-08 | Array of lead frames and packaging body |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207367964U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108417554A (en) * | 2018-05-18 | 2018-08-17 | 上海晶丰明源半导体股份有限公司 | Lead frame, array of lead frames and packaging body |
| CN109935565A (en) * | 2019-03-28 | 2019-06-25 | 江西芯诚微电子有限公司 | A kind of integrated circuit package structure of four pins of band heat dissipation |
-
2017
- 2017-11-08 CN CN201721476897.0U patent/CN207367964U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108417554A (en) * | 2018-05-18 | 2018-08-17 | 上海晶丰明源半导体股份有限公司 | Lead frame, array of lead frames and packaging body |
| CN109935565A (en) * | 2019-03-28 | 2019-06-25 | 江西芯诚微电子有限公司 | A kind of integrated circuit package structure of four pins of band heat dissipation |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Assignee: Huatian Science & Technology Co., Ltd., Tianshui Assignor: Shanghai semiconducto Limited by Share Ltd Contract record no.: 2018310000047 Denomination of utility model: Lead frame, lead frame array and packaging body Granted publication date: 20180515 License type: Exclusive License Record date: 20181010 |
|
| EE01 | Entry into force of recordation of patent licensing contract |