CN207320103U - 半导体封装 - Google Patents
半导体封装 Download PDFInfo
- Publication number
- CN207320103U CN207320103U CN201721096191.1U CN201721096191U CN207320103U CN 207320103 U CN207320103 U CN 207320103U CN 201721096191 U CN201721096191 U CN 201721096191U CN 207320103 U CN207320103 U CN 207320103U
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- China
- Prior art keywords
- tube core
- conductive
- substrate
- semiconductor packages
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
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Classifications
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Abstract
本实用新型涉及一种半导体封装,包括衬底、管芯、绝缘管芯贴装薄膜、仿真管芯、传导层和导电模塑料或密封剂。衬底的第一表面包括多个内部引线,并且衬底的第二表面包括多个外部导电焊盘和导电接地端子。非传导线上流动管芯贴装薄膜被放置以围绕并且包住管芯。仿真管芯覆在管芯上面,并且传导层覆在仿真管芯上面。导电模塑料被形成以包住半导体器件的各种组件。导电模塑料被电气耦合到导电接地端子和传导层,从而形成用于封装中的管芯的EMI屏蔽。
Description
技术领域
本实用新型涉及一种具有衬底、线上流动管芯贴装薄膜、仿真半导体管芯上的传导层和覆在衬底上的传导模塑料的半导体封装。
背景技术
随着消费者对更薄的封装的需求的增加,制造商面临形成足够薄以在电子设备内运行的封装的重大挑战。此外,随着更灵敏的电气组件和连接被添加到半导体封装和电子设备,制造商面临减少暴露于来自单个电子设备中的电气组件或来自外部环境的电磁干扰(EMI)的重大挑战。半导体封装常常包括半导体管芯、电气连接和需要被保护以防EMI的电气组件。例如,封装可以包括非传导模塑料或非传导密封剂来保护单个分立单元中的封装的元件。封装然后被涂敷有传导材料以形成EMI保护涂层。
其他半导体封装可以包括非传导球状顶幕(glob top drop)材料,其被形成在半导体管芯、电气连接和电气组件上。非传导球状顶幕材料然后由传导模塑料或传导密封剂覆盖以使半导体管芯免受EMI影响。
以上成形技术被用于形成具有EMI保护的封装,以使封装内的半导体管芯和电气连接/组件免受电子设备内的EMI或外部环境影响。遗憾的是,通过将传导模塑料覆在顶部封装水滴材料上形成EMI保护的封装导致更大、更厚的封装。也存在其他困难。第一,当形成EMI保护涂层时,利用导电材料涂敷封装可能引起不期望的电气连接。第二,当利用导电材料涂敷封装的整个外部时,封装的各部分可能未被覆盖,这减少了EMI保护的有效性。第三,球状顶幕材料可能未完全覆盖基本电气连接。
实用新型内容
因此,本实用新型旨在解决上述提及的技术问题。
本实用新型提供具有通过利用非导电和导电材料的组合制造的EMI屏蔽的半导体封装。更特别地,非导电材料包住封装的电气组件,诸如管芯、接触焊盘、电气连接、导线等,并且导电材料覆盖非导电材料以使封装的电气组件免受EMI影响。导电材料被接地,以将任何EMI电荷短路到接地,而没有到达电气组件。
根据一个实施例,形成具有衬底、管芯、覆在管芯上的管芯贴装薄膜和覆在管芯贴装薄膜上的导电模塑料。在该实施例中,多个引线在衬底的第一面上,并且多个传导焊盘和导电接地端子在衬底的第二面上。导电接地端子和多个传导焊盘中的传导焊盘被电气连接到多个引线中的相应引线。管芯被贴装到衬底的第二面,并且导线被形成以将管芯耦合到多个传导焊盘中的相应传导焊盘。管芯贴装薄膜可以是被放置到衬底上的固体上的形式。在一个实施例中,管芯贴装薄膜主体包括:仿真管芯,在其正表面上具有导电层;和第一管芯贴装薄膜,其是非传导材料。管芯贴装薄膜主体的第一管芯贴装薄膜围绕多个导线并且包住管芯和传导焊盘。此外,仿真管芯覆在第一管芯贴装薄膜、管芯、导线和多个传导焊盘上面。传导层覆在仿真管芯上面。导电模塑料被形成以包住管芯贴装薄膜主体和导电接地端子。导电模塑料与接地端子和仿真管芯上的传导层电气接触。导电模塑料、仿真管芯的导电层与导电接地端子之间的电气接触将封装的外层的整个上部接地。导电模塑料和仿真管芯的导电层的这种接地形成EMI屏蔽。该EMI屏蔽将管芯与任何外部EMI电气隔离。
这种EMI屏蔽具有以下附加益处:如果EMI足够强使得其穿过导电模塑料,那么仿真管芯的传导层充当提供附加保护以使任何外部EMI耗散的另一EMI屏蔽。
在一个实施例中,封装包括衬底、管芯、管芯贴装薄膜主体和导电模塑料。管芯贴装薄膜主体包括第一管芯贴装薄膜、非传导层和传导层。在一个备选方案中,传导层暴露于外部环境,而在另一备选实施例中,传导层由导电模塑料覆盖。
本实用新型提供了一种半导体封装,包括:衬底,其具有第一面和第二面;多个引线,其在所述衬底的所述第一面上;导电接地端子,其在所述衬底的所述第二面上,所述导电接地端子电连接到所述多个引线中的相应引线;多个传导焊盘,其在所述衬底的所述第二面上;管芯,其耦合到所述衬底的所述第二面;多个导线,每个导线具有耦合到所述管芯的第一端和耦合到所述多个传导焊盘中的相应传导焊盘的第二端;第一管芯贴装薄膜,其覆在所述管芯、所述多个传导焊盘和所述多个导线上面,所述第一管芯贴装薄膜围绕所述多个导线并且包住所述管芯和所述传导焊盘,所述第一管芯贴装薄膜耦合到所述衬底;电隔离层,其覆在所述第一管芯贴装薄膜上面;传导层,其与所述电隔离层直接接触并且覆在所述电隔离层上面;以及导电模塑料,其覆在所述衬底、所述导电接地端子、所述第一管芯贴装薄膜、所述管芯、所述电隔离层和所述传导层上面,所述导电模塑料将所述导电接地端子耦合到所述传导层。
在一个实施例中,所述半导体封装还包括:多个焊球,每个焊球耦合到所述多个引线中的相应引线。
在一个实施例中,所述电隔离层是仿真管芯。
在一个实施例中,所述仿真管芯是无掺杂仿真半导体管芯。
在一个实施例中,所述衬底的所述第二面上的所述多个传导焊盘中的每个传导焊盘电耦合到所述衬底的所述第一面上的所述多个引线中的相应引线。
在一个实施例中,所述半导体封装还包括:第二管芯贴装薄膜,其将所述管芯耦合到所述衬底的所述第二面。
在一个实施例中,覆在所述第一管芯贴装薄膜上面的所述电隔离层是硅材料。
在一个实施例中,与所述电隔离层直接接触并且覆在所述电隔离层上面的所述传导层是导电材料。
在一个实施例中,所述导电材料是沉积在所述电隔离层上的铝材料。
在一个实施例中,所述第一管芯贴装薄膜是非导电材料和线上流动管芯贴装薄膜。
本实用新型还提供了一种半导体封装,包括:衬底,其具有管芯贴装表面和非管芯贴装表面;多个引线,其在所述衬底的所述非管芯贴装表面上;导电接地端子,其在所述衬底的所述管芯贴装表面上,所述导电接地端子电连接到所述多个引线的相应引线;多个导电焊盘,其在所述衬底的所述管芯贴装表面上;管芯,其通过管芯贴装薄膜耦合到所述衬底的所述管芯贴装表面;多个导线结合互连,每个导线结合互连具有耦合到所述管芯的第一端和耦合到所述多个导电焊盘中的相应导电焊盘的第二端;非传导管芯贴装薄膜,其覆在所述衬底、所述管芯、所述多个导电焊盘和所述多个导线结合互连上面,所述非传导管芯贴装薄膜耦合到所述衬底,所述非传导管芯贴装薄膜围绕所述多个导线结合互连并且包住所述管芯和所述多个导电焊盘;非传导层,其覆在所述非传导管芯贴装薄膜上面;以及导电密封剂,其覆在所述衬底和所述导电接地端子上面,所述导电密封剂覆盖所述非传导管芯贴装薄膜、所述非传导层和所述导电接地端子的侧面。
在一个实施例中,所述半导体封装还包括电磁干扰屏蔽层,其覆在所述非传导层上面并且与所述非传导层直接物理接触。
在一个实施例中,所述导电密封剂覆在所述非传导管芯贴装薄膜、所述管芯、所述非传导层和所述电磁干扰屏蔽层上面。
在一个实施例中,所述电磁干扰屏蔽层是耦合到所述非传导层和所述导电密封剂的导电材料。
在一个实施例中,沉积在所述非传导层上的所述导电材料是铝材料。
在一个实施例中,所述电磁干扰屏蔽层是裸露的,是导电材料,并且耦合到所述非传导层和所述导电密封剂。
在一个实施例中,所述导电密封剂耦合到所述衬底。
在一个实施例中,所述半导体封装还包括多个焊球,每个焊球耦合到所述多个引线中的相应引线。
在一个实施例中,所述非传导层是仿真无掺杂半导体管芯。
因此,本实用新型提供了可靠的EIM保护,其减少了封装的大小、减少了制造成本并且增加了来自每个制造批量的可行封装和半导体管芯的总百分比。
附图说明
在附图中,除非上下文另外指明,否则相同附图标记标识相同元件或者动作。附图中的元件的大小和相对位置不必按比例绘制。
图1是具有EMI屏蔽的第一现有技术半导体封装的横截面侧视图;
图2是具有EMI屏蔽的第二现有技术半导体封装的横截面侧视图;
图3是具有所公开的EMI屏蔽组件的半导体封装的实施例的横截面侧视图;
图4至图7是根据所公开的实施例的形成管芯贴装薄膜主体的方法的连续步骤的横截面侧视图;
图8至图13是根据所公开的实施例的形成具有EMI屏蔽的半导体封装的方法的连续步骤的横截面侧视图;
图14是如图3中的、具有根据由图4至图13所示和所描述的方法制造的EMI屏蔽的最后封装的横截面侧视图;
图15是具有EMI屏蔽的完整封装的备选实施例的横截面侧视图;
图16是具有EMI屏蔽的完整封装的备选实施例的横截面侧视图;
图17是具有EMI屏蔽的完整封装的备选实施例的横截面侧视图;以及
图18是具有根据图4至图13的EMI屏蔽制造过程的封装的连续步骤的流程图。
具体实施方式
在以下描述中,阐述某些特定细节以便提供本公开的各种实施例的透彻理解。然而,本领域的技术人员将理解到,可以在没有这些特定细节的情况下实践本公开。在其他实例中,没有详细描述与电子组件和制造技术相关联的众所周知的结构以避免不必要地模糊本公开的实施例的描述。
除非上下文另外要求,否则贯穿说明书和下面的权利要求,词语“包括(comprise)”和其变型(诸如“包括(comprises)”和“包括(comprising)”)将以开放式的包括性意义被解释为“包括但不限于”。
序数词(诸如第一、第二和第三)的使用未必隐含次序的排列意义,而是可以仅在动作或结构的多个实例之间进行区分。
贯穿本说明书对“一个实施例”或“实施例”的引用意味着结合实施例所描述的特定特征、结构或特点被包括在至少一个实施例中。因此,贯穿本说明书的各个地方出现短语“在一个实施例中”或“在实施例中”未必都是指代相同实施例。而且,特定特征、结构或特性可以以任何适合的方式组合在一个或多个实施例中。
如在本说明和随附的权利要求中所使用的,除非内容另外清楚地指明,否则单数形式“一”、“一个”和“该”包括复数指示物。还应当注意,除非内容另外清楚地指明,否则术语“或者”通常以其包括“和/或”的意义被采用。
图1示出了第一现有技术封装30,其包括衬底32、接地端子34、多个引线36、多个焊球38、多个导线40、导电材料42、管芯44、胶粘剂46、多个接触焊盘48和非导电环氧树脂模塑料50。
在该第一现有技术封装30的实施例中,在第一现有技术封装30的制造期间,衬底32被定位为基本层。衬底32具有第一表面和第二表面。衬底包括衬底32的第二表面上的多个引线36、衬底32的第一表面上的并且沿着衬底32的第一表面的边缘被定位的接地端子34和衬底32的第一表面上的多个接触焊盘48。衬底32具有管芯44,其耦合到衬底32的第一表面。管芯44通过胶粘剂46被耦合到衬底32的第一表面。管芯44通过多个导线40电气耦合到多个接触焊盘48。衬底32包含供多个接触焊盘48和接地端子34电气耦合到多个引线36的电气连接和组件。多个焊球38可以形成在多个引线36的每个相应引线上,用于将第一现有技术封装30安装在电子设备(诸如电话、平板电脑、计算机、膝上型电脑、计算器等)内。非导电环氧树脂模塑料50形成在衬底32上,以密封多个接触焊盘48、多个导线40和管芯44。另外,非导电环氧树脂模塑料50必须使衬底32上的接地端子34的至少一侧裸露。
导电材料42然后被飞溅到第一现有技术封装30的外部上。备选地,导电材料42可以喷涂或电镀到第一现有技术封装30上。导电材料42覆盖衬底32和非导电环氧树脂模塑料50的所有裸露面。而且,导电材料42覆盖衬底32上的接地端子34的至少一侧。与接地端子34的至少一侧接触并且耦合的导电材料42充当使管芯免受电子设备内的EMI或外部环境的EMI影响的电磁干扰(EMI)屏蔽。
图2示出了第二现有技术封装52,其包括衬底54、多个接地端子56、多个引线58、多个焊球60、多个导线62、管芯64、胶粘剂66、多个接触焊盘68、非导电球状顶幕70和导电环氧树脂模塑料72。
在该第二现有技术封装52实施例中,在第二现有技术封装52的制造期间,衬底54被定位为基本层。衬底54具有第一表面和第二表面。而且,衬底54包括衬底54的第二表面上的多个引线58、衬底54的第一表面上的多个接触焊盘68和衬底54的第一表面上的多个接地端子56。管芯64通过胶粘剂66被耦合到衬底54。此外,管芯64通过多个导线62电气耦合到多个接触焊盘68。衬底54包含供多个接触焊盘68和多个接地端子56电气耦合到多个引线58的电气连接和组件。多个焊球60可以形成在多个引线58上,用于将第二现有技术封装52安装在电子设备(诸如电话、平板电脑、计算机、膝上型电脑、计算器等)内。
球状顶幕70被形成以密封多个导线62、管芯64、胶粘剂66和多个接触焊盘68。此外,球状顶幕70由非导电材料制成。导电环氧树脂模塑料72被形成以密封球状顶幕70和衬底54的第一表面上的多个接地端子56。导电环氧树脂模塑料72与多个接地端子56接触并且耦合,并且充当使管芯64免受EMI影响的(EMI)屏蔽。
这是现有技术封装的两个例子,它们示出了现今将管芯与外部EMI屏蔽的尝试的某些缺点。
本公开描述了克服现有技术的这些缺点中的许多缺点的封装。本公开描述的各种封装具有的EMI是在没有喷涂、飞溅或者电镀封装的情况下形成的,并且因此避免了这些缺点。根据本公开的封装提供通过利用非传导的线上流动(flow over wire)管芯贴装薄膜所形成的EMI屏蔽。例如,线上流动管芯贴装薄膜是非导电材料。其在所选择的高温或高压或二者的组合处变为可塑的(例如,半流体状态)。因此,通过将具有半导体管芯的衬底加热到所选择的高温或放在高压下或二者的组合,线上流动管芯贴装薄膜可以包住管芯和连接到其的导线。线上流动管芯贴装薄膜变为可塑的,并且根据需要被放置以覆盖、围绕并且包住半导体管芯和衬底上的电气连接和部件。线上流动管芯贴装薄膜在电气组件或管芯之间没有留下空间或间隙。一旦线上流动管芯贴装薄膜在适当的位置,则线上流动管芯贴装薄膜就从高温或高压或二者的组合中被移除,以允许固化。一旦固化过程完成,则线上流动管芯贴装薄膜就变为硬的,并且不再是可塑的。在此之后,导电模塑料或其他密封剂被放置在线上流动管芯贴装薄膜上面,以形成最终封装并且创建EMI屏蔽。
在一个实施例中,在关心贴装薄膜被放置在衬底上之前,将硅材料的仿真半导体管芯放置放置在管芯贴装薄膜上,以形成甚至更强的EMI屏蔽,仿真半导体管芯是未参杂的,其上具有一层导电材料。
图3图示了用于使用覆在管芯上面的可塑管芯贴装薄膜提供EMI保护的本公开的一个实施例。该实施例示出了与电磁干扰(EMI)屏蔽的封装74。该封装包括衬底76、导电接地端子78、多个引线80、多个焊球82、多个导线84、管芯贴装薄膜86、仿真管芯88、传导层90、管芯胶粘剂92、多个传导焊盘94、管芯96和传导模塑料98。
用于管芯贴装薄膜86的一个可接受的材料是在半导体工业中众所周知的类型的线上流动管芯贴装薄膜。该类型的线上流动管芯贴装薄膜的一个商业来源是AITechnology,其也使用徽标AiT。AiT现今在市场中标价出售各种类型的可接受的线上流动管芯贴装薄膜以供使用,如本文所描述的。由AiT销售的一个这样的管芯贴装薄膜是ESP7660FOW系列,其导热但是电绝缘。在AiT标价出售的各种管芯贴装薄膜中,AiT所使用的术语FOW代表线上流动(Flow OverWire)。AiT销售的ESP7660FOW系列呈现各种不同的厚度,基于被暴露于不同的热处理或压力处理而具有不同的流动性质,如在由AiT所提供的文献中所描述的。所接受的其他产品是ESP7665FOW系列和ESP7666FOW系列产品,其也是本领域中众所周知的但是用于与本文所描述的那些用途不同的用途的产品。在AiT提供给公众的数据表中描述了AiT销售的这些各种FOW薄膜的特性,包括使得它们可塑、引起流动、执行固化的温度和/或压力以及其他特性,因此在本文中不对此进行重复。
术语管芯贴装薄膜(Die Attach Film)或DAF指代非常宽的一组产品,其可以包括粘贴、胶粘剂、胶水和将管芯连接到衬底的一般组中的任何产品。当前使用的该术语DAF是工业中的非常宽的术语,并且包括比线上流动、管芯贴装薄膜、FOW DAF更多的产品。
在该实施例中,衬底76具有第一面和第二面。第一面包括多个引线80,而第二面包括导电接地端子78和多个传导焊盘94。多个传导焊盘94中的传导焊盘是导电的。此外,衬底76可以是硅材料、二氧化硅材料、氧化铝材料、蓝宝石材料、PCB、聚酰亚胺带、卡普顿材料或半导体工业中已知的可以用作衬底的某种其他材料。衬底76包含电气连接95,其耦合导电接地端子78电气并将导电接地端子78电气耦合到接地引线80。还存在未示出的、从管芯96的信号和电力结合焊盘94到它们所连接的相应端子80的其他电气连接。多个焊球82可以形成在多个引线80上,用于将具有EMI屏蔽的封装74安装在电子设备(诸如电话、平板、计算机、膝上型电脑、计算器等)内。
管芯96通过胶粘剂92被耦合到衬底76。该胶粘剂92可以是将管芯的背面连接到衬底的类型的标准胶粘剂,该类型通常导电以将管芯96的背面接地。胶粘剂92可以位于管芯贴装薄膜的宽泛的组内,如先前所讨论的。在一个实施例中,胶粘剂92可以是由管芯贴装薄膜86使用的相同类型的材料。当然,其将是更薄的并且其可以是非传导材料或者是传导材料。其可以是被用于将管芯的背面连接到衬底的类型的FOW DAF类型,如本领域中已知的。
管芯96可以是任何类型的半导体管芯。其可以是微处理器和ASCI(根据需要测量任何量的传感器)。例如,管芯96可以测量电子设备的速度、定向、高度、位置等。
管芯96通过多个导线84被耦合到多个传导焊盘94。更特别地,多个导线84的相应导线的第一端被耦合到管芯96,并且多个导线84的相应导线的第二端被耦合到多个传导焊盘94的相应传导焊盘。
第一管芯贴装薄膜86被用于形成半导体封装74的电磁干扰(EMI)屏蔽。第一管芯贴装薄膜86是在高温或高压或二者的组合处变为可塑(例如,半流体状态)的非导电材料,如先前所解释的。例如,第一管芯贴装薄膜86是线上流动管芯贴装薄膜或管芯上流动、管芯贴装薄膜。第一管芯贴装薄膜86被用于密封、围绕和包住多个导线84、胶粘剂92、多个传导焊盘94和管芯96。更特别地,第一管芯贴装薄膜86是非导电材料,其能够在多个导线84和管芯96上流动,而不损害多个导线84、管芯96或者多个导线、多个导电焊盘94和管芯96之间的电气连接。而且,第一管芯贴装薄膜86在任意导线84、衬底76、多个传导焊盘94和管芯96之间基本上没有留下间隙或空间。充当电气隔离层的仿真管芯88被耦合到第一管芯贴装薄膜86,仿真管芯88覆在第一管芯贴装薄膜86、管芯96、多个导线84、衬底76和多个传导焊盘94上面。仿真管芯88可以是非传导的刚性材料(诸如硅)。更特别地,仿真管芯88可以是不具有有源组件并且是无掺杂本征硅的薄硅晶圆。其可以是稍微p型掺杂的,因为本征硅具有非常轻的n型浓度,使得非常轻的p型掺杂使其甚至更不传导。仿真管芯88可以是某种其他非传导的刚性材料。传导层90被耦合到仿真管芯88以直接地在管芯96上面形成EMI屏蔽。传导层90可以是铝层、铜层、镍钯层、银层、金层或导电材料的某种其他组合。
传导模塑料98被形成以将管芯贴装薄膜86、胶粘剂92、仿真管芯88、传导层90和导电接地端子78密封在衬底76上。传导模塑料98被耦合到传导层90。而且,传导层90和传导模塑料98由衬底76上的导电接地端子78接地。进而,传导模塑料98、传导层90和导电接地端子78形成EMI屏蔽,以保护封装74中的管芯96、多个导线84和多个传导焊盘94免受来自外部封装74环境的EMI影响。
利用管芯贴装薄膜86(其是在高温或高压或二者的组合处变为可塑的非导电线上流动管芯贴装薄膜),非导电材料的仿真管芯88、导电材料的传导层90和导电模塑料98形成具有EMI屏蔽的封装。另外,利用管芯贴装薄膜86密封来封装74的易碎电气组件84、94、96,减少了由封装74的易碎电气组件84、94、96的非覆盖引起短路的机会。这是因为,第一管芯贴装薄膜86比球状顶幕材料更准确地被放置和成型。例如,由于外部压力(诸如振动、气袋等),流体状态的球状顶幕更可能不适当地覆盖易碎电气组件84、94、96。另外,流体状态的球状顶幕可能散布到覆盖封装的接地端子56的程度。如果球状顶覆盖接地端子56中的一个或多个,那么传导模塑料由于固体的非常低的电阻连接而未接地,并且可能无法形成有效的EMI屏蔽。与球状顶幕不同,管芯贴装薄膜86在高压、高温或二者的组合处是可塑的,这允许管芯贴装薄膜86维持其形状,同时覆盖易碎电气组件84、94、96。此外,即使管芯贴装薄膜86变得太流体,并充分流动以使导线84暴露,非传导材料的仿真管芯88也会接触多个导线84。该仿真管芯88是非传导的,并且用于防止传导模塑料接触导线84。而且,管芯贴装薄膜86附着于仿真管芯88。如果管芯贴装薄膜86流动足够低使得仿真管芯88触摸导线84的上边缘,则仿真管芯将在该阶段处停止移动并且由导线84暂停,这将把管芯贴装薄膜86保持在适当的位置,并且防止其移动附加距离。甚至当多个导线84可能在上表面或边缘处裸露时,这将防止封装74短路。
利用管芯贴装薄膜86(其是在高温或高压或二者的组合处变为可塑的非导电线上流动管芯贴装薄膜),允许产生更薄的封装74。产生更薄的封装74,这是因为,与球状顶幕不同,由于当被形成在易碎电气组件84、94、96上并且嵌入易碎电气组件84、94、96时管芯贴装薄膜86维持其形状,因而管芯贴装薄膜86的高度更接近于封装74中的导线84的高度。因此,将使用更少的模塑料完成封装74、128、130、180(参见图14、图15、图16和图17),因此允许成本更低的、具有更少的缺陷并且具有更薄的轮廓的具有EMI屏蔽的封装产生。薄的低高度轮廓的封装在许多应用中都是期望的,因为现在在市场中提供薄电子设备,诸如手表、可穿戴电子装置和其他极薄的设备。而且,与由金属外壳(诸如电话、平板电脑或便携式计算机)围绕的壳体中的芯片相比,手表、可穿戴电子装置、眼镜、鞋等中的这些芯片更可能暴露于大量的各种EMI脉冲。因此,在非常薄封装中提供可靠的EMI保护具有若干商业优点。
图4至图7图示了在制造个体和单一的管芯贴装薄膜主体106时的步骤。管芯贴装薄膜主体106每个都包括管芯贴装薄膜86、仿真管芯88和导电层90。图4是仿真晶圆100的横截面侧视图。仿真晶圆100是大型晶圆,其包括将变为成百上千的个体仿真管芯的东西。仿真晶圆100可以是非传导材料的晶圆,诸如没有有源表面的薄硅无掺杂晶圆。备选地,仿真晶圆100可以是稍微掺杂的p型,因为那将比本征无掺杂硅甚至更不传导。仿真晶圆还可以是石英、蓝宝石、玻璃、碳或在其上可以形成导体的任何其他刚性主体。在其他实施例中,仿真晶圆是高度传导材料,诸如高度n或p型掺杂硅。可以容易地提供有上传导层的任何刚性构件都可以被用于仿真晶圆,并且因此用于仿真管芯。
最终目标是使仿真管芯并且因此仿真晶圆具有传导性的上表面,其将通过引导传播或接地输出来阻止所有EMI脉冲。因此,如果整个仿真晶圆是传导的,则那是可接受的。仿真晶圆(无论掺杂还是非掺杂)的硅的使用是方便并且低成本的。半导体管芯的封装过程被很好地开发用于处理硅晶圆和管芯。因此,在不必修改该过程的机械、温度或其他部件的情况下,针对仿真晶圆和管芯的硅的使用平滑地适配到当前过程流中。因此,仿真晶圆的硅的使用在当前过程流中是优选的。仿真晶圆100可以在两侧抛光并且清洁,以形成仿真晶圆100上的一致并且平坦的表面。备选地,仿真晶圆100可以仅在一侧抛光,或者仿真晶圆100可以根本不抛光。
图5示出了仿真晶圆100的一个表面被传导材料102覆盖的横截面侧视图。传导材料是薄的导电材料,诸如铜、铝、金、银、镍-钯或任何其他导电金属、材料或其组合。优选的导体材料是铝合金,其包含少量的硅(诸如大约98%Al和1-2%Si)以及其他微量元素。传导材料102可以由焊盘层沉积(诸如通过飞溅、电镀、喷涂、化学气相沉积(CVD)或用于在衬底上形成传导材料薄层的半导体工业公知的任何其他成形技术)形成。而且,在传导材料102被形成在仿真晶圆100上之后,仿真晶圆可以在没有传导材料102的面上被抛光或者磨损,以减少仿真晶圆100的厚度。在大多数实施例中,应用传导层102,而仿真晶圆100是相当厚的,使得可以利用标准硅处理设备执行沉积。然后,在层102被沉积之后,背面被抛光,使得晶圆100变得非常薄,如在图5中所示。
图6示出了仿真晶圆100的第一表面上的传导材料102和管芯贴装薄膜(有时被称为DAF)层104的横截面侧视图,管芯贴装薄膜层104是在高温或高压或二者的组合处变为可塑(例如,半流体状态)的非导电线上流动管芯贴装薄膜。该管芯贴装薄膜104被提供作为大型晶圆,其具有大约与晶圆100相同的直径。管芯贴装薄膜晶圆被耦合到仿真晶圆的第二表面,其与仿真晶圆100的具有传导材料102的第一表面相对。取决于使用的管芯贴装薄膜的类型,管芯贴装薄膜层104可以在该阶段处部分地固化,以使其稍微更刚性并且坚固地将其附接到晶圆100。如果需要的话,胶粘剂可以被应用在晶圆100与管芯贴装薄膜104之间,以将它们固定到彼此。一旦管芯贴装薄膜被附接到晶圆100的背面,则它们变为大型晶圆,起将稍后将被单个化(sigulate)成分离的单元106。存在可以被用于将强粘附到硅的管芯贴装薄膜晶圆104的若干材料,其中的许多先前已经讨论了,并且以FOW DAF的名义可购得,并且销售这样的管芯贴装薄膜晶圆的一个公司是AiT。
图7示出了管芯贴装薄膜主体106被单个化的横截面侧视图。通过利用切割设备103将仿真晶圆100、传导材料102和管芯贴装薄膜层104的组合切成单个的个体管芯贴装薄膜主体106,来形成管芯贴装薄膜主体106。个体管芯贴装薄膜主体106包括管芯贴装薄膜86、仿真管芯88和传导层90。切割设备103可以是刀片、锯、激光蚀刻或半导体工业公知的用于切割该类型的晶圆的任何其他切割设备或技术。
图8至图13图示了形成具有EMI屏蔽的封装74(参见图14)的一个实施例的步骤。图8示出了衬底层114的横截面侧视图,其包括衬底层114的第一表面上的导电接地端子78、衬底层114的第一表面上的多个传导焊盘94和衬底层114的第二表面上的多个引线80。衬底层114可以是PCB、聚酰亚胺材料、卡普顿材料或半导体工业公知的某种其他方衬底材料。另外,衬底层114具有电气连接和组件,其通过衬底层114从上面延伸到底面,该电气连接和组件将导电接地端子78和多个传导焊盘94电气耦合到多个引线80的相应引线。在每个面上具有传导焊盘和端子并且在传导焊盘和端子之间具有内部电气连接的衬底的形成在本领域中是众所周知的,因此在此不对此进行进一步描述。
图9示出了耦合到衬底层114的胶粘剂92和管芯96的横截面侧视图。管芯96通过任何可接受的类型的胶粘剂92被耦合到衬底层114的第一表面,在一些情况下,胶粘剂92将是第二管芯贴装薄膜。这样,管芯96被耦合到衬底层114,并且可以在多个传导焊盘94与导电接地端子78之间。管芯96可以是用于期望的目的(诸如存储器、ASCI、处理器、传感器等)的任何管芯。另外,胶粘剂92可以是传导材料或非传导材料。如果胶粘剂92是传导材料,则其可以将管芯96电气耦合到接地或衬底层114的其他电气连接或组件。
图10示出了多个导线84将管芯96耦合到多个传导焊盘94的横截面侧视图。特别地,多个导线84的相应导线的第一端被耦合到多个传导焊盘94的相应传导焊盘,并且相应导线的第二端被耦合到管芯96。可以由导线结合或半导体工业公知的某种其他技术形成多个导线84。在一个实施例中,未使用导线84。如果期望具有超薄封装74(其可以是关于图17的封装180的情况),那么管芯96可以通过反装芯片技术连接,与衬底114接触,在反装芯片技术中,管芯96的有源表面面向下方。管芯上的结合焊盘可以直接地接触引线94,这使轮廓甚至更薄,因为上表面上将没有导线。在该反装芯片实施例中,仿真管芯可以使其背侧表面直接地邻接管芯的背面,或其可以由管芯贴装薄膜86分离。
图11示出了管芯贴装薄膜主体106的横截面侧视图,其包括被放置的第一管芯贴装薄膜86、仿真管芯88和传导层90,其覆在衬底114上的每个管芯上。管芯贴装薄膜主体106的管芯贴装薄膜86是线上流动管芯贴装薄膜,其在高温、高压或二者的组合处变为可塑的。管芯贴装薄膜主体106(参见图4至图7)的第一管芯贴装薄膜86被放置以覆在多个导电焊盘94、多个导线84和管芯96上面。更特别地,第一管芯贴装薄膜86围绕多个导线84并且包住管芯96和传导焊盘94。而且,第一管芯贴装薄膜86被耦合到衬底层114。管芯贴装薄膜主体106被放置在高压或者高温或者二者下,以允许第一管芯贴装薄膜86变为可塑的。虽然第一管芯贴装薄膜86处于某个点,其中,第一管芯贴装薄膜86足够可塑以容易地流经多个传导焊盘94、管芯96和多个导线84(衬底层114上的管芯贴装薄膜主体106),流经多个传导焊盘94、第二管芯贴装薄膜92、管芯96和多个导线84,但是允许其完全包住管芯96和连接到管芯96的导线84,如在图11中所示。在管芯贴装薄膜主体106已经被放置之后,管芯贴装薄膜主体106被允许冷却或者暴露于更低的压力或者二者。通过从高热或高压中移除管芯贴装薄膜主体106,第一管芯贴装薄膜86开始变硬并且变为刚性的。管芯贴装薄膜主体106的第一管芯贴装薄膜86由任何可接受的技术完全固化。例如,其可以被允许通过冷却或通过应用UV光或其他已知方法完全固化。在其完全固化之后,其将覆盖、围绕并且包住多个传导焊盘94、管芯96和多个导线84。在管芯贴装薄膜主体106的第一管芯贴装薄膜86已经完全固化之后,其变为刚性并且硬的,并且不再可塑。图12示出了覆盖、包住和嵌入管芯贴装薄膜主体106和导电接地端子78的传导模塑料层122的横截面侧视图。传导模塑料层122是导电的。传导模塑料层122被形成以与管芯贴装薄膜主体106的传导材料102和导电接地端子78电气接触。另外,管芯贴装薄膜主体106的导电模塑料层122和传导层90由衬底层114上的导电接地端子78电气接地。而且,多个焊球82可以形成在多个引线80的相应引线80。多个焊球82允许将封装安装在电子设备(诸如膝上型电脑、平板电脑、计算机、计算器、电话等)内。
图13示出了具有EMI屏蔽的个体封装74的单个化过程的横截面侧视图。切割设备125被用于对个体封装74进行单个化。切割设备125可以是刀片、激光、锯或半导体工业中已知的用于封装单个化的某种其他切割设备。
图14示出了具有EMI屏蔽的单个化的完成的封装74的横截面侧视图,其是图3的再现,被放在这里是为了示出图4至图13的步骤全部组合起来而产生的产品。EMI屏蔽包括传导层90、传导模塑料98和导电接地端子78。EMI屏蔽吸收或阻止来自封装内的电气组件的电磁干扰(EMI)。即,如果EMI事件源自封装74内,则EMI屏蔽将使其完全包住在封装74自身内。在许多情况下,管芯96是传感器管芯,并且因此可能产生EMI脉冲,这取决于管芯类型和正感测的事件。EMI屏蔽对于阻止源自封装74外部的EMI也是有效的。
图15是具有EMI屏蔽的单个的完成的封装128的备选实施例。与图14中的实施例不同,单个的完成的封装128的该备选实施例不具有可选的多个焊球82。相反,多个引线80可以是用于任何完成的封装128的任何类型的可接受的引线。封装128可以是任何表面安装器件(SMD),诸如方形扁平封装(QFP)、方形扁平无引线(QFN)、LGA或任何可接受的SMD。其还可以是SIP、DIP或任何可接受的延长引线封装、通孔类型封装。其可以在任何类型的芯片载体封装、引脚网格阵列、球网格阵列、扁平封装、小轮廓封装或期望屏蔽EMI的任何类型的半导体封装中。其在例如将使用在可穿戴电子装置中的类型的超薄封装中是特别有用的。因此,引线80将被认为是可以使用在任何类型的封装中的一般引线。
图16是具有EMI屏蔽的单个的完成的封装130的另一备选实施例。与图13和图14中的实施例不同,在该备选实施例中,传导层90暴露于外部环境。传导层90在边缘处与传导模塑料131电气接触。传导模塑料131与导电接地端子78电气接触。通过使EMI屏蔽的传导层90裸露并且不使其覆盖有模塑料131,单个的完成的封装130可以比先前的备选实施例制造得更薄。传导层90可以通过磨损形成在传导层90上的传导模塑料131而裸露,或者传导模塑料131可以仅形成如图11中看到的管芯贴装薄膜主体106之间的空间内,以便不覆盖传导层90。
图17是具有EMI屏蔽的单个的完成的封装180的另一备选实施例。然而,与图16中的备选实施例不同,在该备选实施例中,传导模塑料181在顶部处是更薄的,并且不存在覆在仿真管芯88上面的传导层90。这示出了可以如何使单个的完成的封装74、128、130、180更薄或更厚,这取决于封装的应用。而且,与其他实施例不同,在该实施例中,聚酰亚胺带或卡普顿材料已经被用作衬底154。
将卡普顿材料用作衬底154的优点在于,其允许封装180比在利用PCB或基于玻璃纤维的衬底时制造得更薄。如在图17中可以看到,层154是比层176更薄的。图17在所有实施例中不按比例,例如,在一个实施例中,层17将比管芯96更薄。而且,不存在焊球。另外,当将卡普顿材料用作衬底154时,多个引线172、多个导电焊盘168和导电接地端子156可以是更薄的。因此,利用卡普顿材料允许封装180比所公开的封装74、128、130的其他备选实施例制造得甚至更薄。其还允许整个封装180是非常柔性的,这在在用于穿戴的衣服中时是有益的。
图18示出了具有根据图4至图13的EMI屏蔽制造过程的封装的连续步骤的流程图。更特别地,图18示出的流程图概述了在单个批量过程中制造几百、几千或任何数目的具有EMI屏蔽的封装的方法。
在该过程中,管芯贴装主体和管芯在不同的组件步骤上前进,并且然后通过该过程结合为单个封装部件方式。制造的方法包括制造个体管芯贴装主体106。一个步骤是将仿真晶圆901抛光,并且另一步骤是将金属沉积在仿真晶圆902上。这两个步骤在顺序上可以反转,并且以不同顺序被执行,其中首先发生沉积902,并且此后发生变薄901。或者,可以存在第一变薄901,然后金属沉积902,然后第二变薄901。如果期望的话,特别地如果仿真管芯是导电的,则可以省去金属沉积。在此之后,管芯贴装薄膜被耦合到仿真晶圆(步骤903)。当仿真管芯贴装晶圆完全完成时,然后在步骤904中,仿真管芯被单个化为个体管芯贴装薄膜主体106。在分离的轨道上,在不同的位置,形成管芯96(步骤905)。这之后是将管芯贴装到衬底(步骤906),然后其由任何可接受的方法电气连接到衬底,诸如导线结合步骤907。
制造900的方法从两个不同的过程开始:(1)制造管芯贴装薄膜主体106的过程,如在图4至图7中所示,和(2)制造衬底上的多个管芯96的过程,如在图8至图10中所示。制造管芯贴装薄膜主体106的过程包括步骤901-904。抛光仿真晶圆的901步骤对应于图4。在抛光仿真晶圆的901步骤中,仿真晶圆100被抛光以使仿真晶圆100变薄并且具有平坦的一致表面。在仿真晶圆上沉积金属的902步骤中,传导材料102被沉积到仿真晶圆100的一侧。在仿真晶圆上沉积金属的902步骤在图5中被示出为已经完成。在仿真晶圆上沉积金属的902步骤之后,管芯贴装薄膜层104被贴装到仿真晶圆100(903步骤),在图6中已经完成。然后,在单个化步骤904中,仿真晶圆100、传导材料102和管芯贴装薄膜层104被单个化为对应于图7的个体封装。该过程的结果是如在图7中看到的个体管芯贴装薄膜主体106,其包括传导层90、仿真管芯88和第一管芯贴装薄膜86,其是非导电线上流动管芯贴装薄膜。
制造衬底上的多个管芯的过程包括形成管芯(步骤905)、将管芯贴装到衬底(步骤906),以及然后通过任何可接受的技术将管芯电气连接到衬底(步骤907),所述技术之一是导线结合。在图9中,将管芯贴装到衬底的906步骤被示出为完成。在步骤907中,其被电气连接,如在图10中所示。
一旦上面的两个过程完成,,即(1)制造管芯贴装薄膜主体106的过程(如在图4至图7中所示)和(2)制造衬底上的多个管芯的过程(如在图8至图10中所示)完成,管芯贴装薄膜主体106和管芯96、衬底层114和多个导线84就被组合,以形成大型衬底上的大型管芯阵列。管芯贴装薄膜主体106被连接到衬底,如图11中所示。
在图12的步骤910中,模塑料被应用到衬底层114。
在标记步骤912中,在密封徽标之后,ID代码或其他标志被形成在模塑料层122上,如本领域中已知的。可以利用墨水、丝印或任何技术完成标记步骤912。该步骤912是可选的,并且可以在封装单个化之后或完全地由另一方完成。
在步骤914中,多个焊球82被贴装到衬底层114上的多个引线80,但是这是可选的。焊球贴装可以在封装单个化之后或在运载到另一方之后进行,以避免焊球中的缺陷。作为最后步骤,个体封装被单个化(步骤916),对应于图13。
通过利用上文所公开的方法,根据需要,在几百、几千或任何数目的批量中制造具有EMI屏蔽的个体封装。而且,在更少的缺陷和更少的浪费材料的情况下制造具有EMI屏蔽的个体封装。另外,封装内的EMI屏蔽具有两层传导材料:(1)导电模塑料,和(2)传导层。这两个传导层组合创建了更强的EMI屏蔽,允许封装被制造得更薄,并且允许封装在较少的浪费的情况下被制造(诸如缺陷封装或过量传导材料的使用)。
可以组合上文所描述的各种实施例以提供进一步的实施例。在本说明书中所提到和/或申请数据表中所列出的所有美国专利、美国专利申请公开、美国专利申请、外国专利、外国专利申请和非专利公开通过引用方式全部并入本文。如果必要的话,可以修改实施例的方面,以采用各种专利、申请和出版物的概念,以提供更进一步的实施例。
可以根据以上详细描述对实施例做出这些和其他改变。一般而言,在以下权利要求中,所使用的术语不应当被解释为将权利要求限于说明书和权利要求中所公开的特定实施例,而是应当被解释为包括所有可能的实施例连同这些权利要求有权享有的等价方案的全部范围。因此,权利要求不由本公开限制。
Claims (19)
1.一种半导体封装,其特征在于包括:
衬底,其具有第一面和第二面;
多个引线,其在所述衬底的所述第一面上;
导电接地端子,其在所述衬底的所述第二面上,所述导电接地端子电连接到所述多个引线中的相应引线;
多个传导焊盘,其在所述衬底的所述第二面上;
管芯,其耦合到所述衬底的所述第二面;
多个导线,每个导线具有耦合到所述管芯的第一端和耦合到所述多个传导焊盘中的相应传导焊盘的第二端;
第一管芯贴装薄膜,其覆在所述管芯、所述多个传导焊盘和所述多个导线上面,所述第一管芯贴装薄膜围绕所述多个导线并且包住所述管芯和所述传导焊盘,所述第一管芯贴装薄膜耦合到所述衬底;
电隔离层,其覆在所述第一管芯贴装薄膜上面;
传导层,其与所述电隔离层直接接触并且覆在所述电隔离层上面;以及
导电模塑料,其覆在所述衬底、所述导电接地端子、所述第一管芯贴装薄膜、所述管芯、所述电隔离层和所述传导层上面,所述导电模塑料将所述导电接地端子耦合到所述传导层。
2.根据权利要求1所述的半导体封装,其特征在于还包括:多个焊球,每个焊球耦合到所述多个引线中的相应引线。
3.根据权利要求1所述的半导体封装,其特征在于所述电隔离层是仿真管芯。
4.根据权利要求3所述的半导体封装,其特征在于所述仿真管芯是无掺杂仿真半导体管芯。
5.根据权利要求1所述的半导体封装,其特征在于所述衬底的所述第二面上的所述多个传导焊盘中的每个传导焊盘电耦合到所述衬底的所述第一面上的所述多个引线中的相应引线。
6.根据权利要求1所述的半导体封装,其特征在于还包括:第二管芯贴装薄膜,其将所述管芯耦合到所述衬底的所述第二面。
7.根据权利要求1所述的半导体封装,其特征在于覆在所述第一管芯贴装薄膜上面的所述电隔离层是硅材料。
8.根据权利要求1所述的半导体封装,其特征在于与所述电隔离层直接接触并且覆在所述电隔离层上面的所述传导层是导电材料。
9.根据权利要求8所述的半导体封装,其特征在于所述导电材料是沉积在所述电隔离层上的铝材料。
10.根据权利要求1所述的半导体封装,其特征在于所述第一管芯贴装薄膜是非导电材料和线上流动管芯贴装薄膜。
11.一种半导体封装,其特征在于包括:
衬底,其具有管芯贴装表面和非管芯贴装表面;
多个引线,其在所述衬底的所述非管芯贴装表面上;
导电接地端子,其在所述衬底的所述管芯贴装表面上,所述导电接地端子电连接到所述多个引线的相应引线;
多个导电焊盘,其在所述衬底的所述管芯贴装表面上;
管芯,其通过管芯贴装薄膜耦合到所述衬底的所述管芯贴装表面;
多个导线结合互连,每个导线结合互连具有耦合到所述管芯的第一端和耦合到所述多个导电焊盘中的相应导电焊盘的第二端;
非传导管芯贴装薄膜,其覆在所述衬底、所述管芯、所述多个导电焊盘和所述多个导线结合互连上面,所述非传导管芯贴装薄膜耦合到所述衬底,所述非传导管芯贴装薄膜围绕所述多个导线结合互连并且包住所述管芯和所述多个导电焊盘;
非传导层,其覆在所述非传导管芯贴装薄膜上面;以及
导电密封剂,其覆在所述衬底和所述导电接地端子上面,所述导电密封剂覆盖所述非传导管芯贴装薄膜、所述非传导层和所述导电接地端子的侧面。
12.根据权利要求11所述的半导体封装,其特征在于还包括电磁干扰屏蔽层,其覆在所述非传导层上面并且与所述非传导层直接物理接触。
13.根据权利要求12所述的半导体封装,其特征在于所述导电密封剂覆在所述非传导管芯贴装薄膜、所述管芯、所述非传导层和所述电磁干扰屏蔽层上面。
14.根据权利要求13所述的半导体封装,其特征在于所述电磁干扰屏蔽层是耦合到所述非传导层和所述导电密封剂的导电材料。
15.根据权利要求14所述的半导体封装,其特征在于沉积在所述非传导层上的所述导电材料是铝材料。
16.根据权利要求12所述的半导体封装,其特征在于所述电磁干扰屏蔽层是裸露的,是导电材料,并且耦合到所述非传导层和所述导电密封剂。
17.根据权利要求11所述的半导体封装,其特征在于所述导电密封剂耦合到所述衬底。
18.根据权利要求11所述的半导体封装,其特征在于还包括多个焊球,每个焊球耦合到所述多个引线中的相应引线。
19.根据权利要求11所述的半导体封装,其特征在于所述非传导层是仿真无掺杂半导体管芯。
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- 2017-08-30 CN CN201721096191.1U patent/CN207320103U/zh not_active Withdrawn - After Issue
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Publication number | Priority date | Publication date | Assignee | Title |
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CN108666301A (zh) * | 2017-03-30 | 2018-10-16 | 意法半导体公司 | 为半导体管芯提供电磁干扰屏蔽的线上流动管芯贴装薄膜和传导模塑料 |
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US9953933B1 (en) | 2018-04-24 |
CN108666301A (zh) | 2018-10-16 |
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