CN206250175U - 一种双向esd防护二极管的dfn封装结构 - Google Patents

一种双向esd防护二极管的dfn封装结构 Download PDF

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CN206250175U
CN206250175U CN201621316409.5U CN201621316409U CN206250175U CN 206250175 U CN206250175 U CN 206250175U CN 201621316409 U CN201621316409 U CN 201621316409U CN 206250175 U CN206250175 U CN 206250175U
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chip
diode
dfn
directional esd
drawn
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薛维平
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SHANGHAI CORE STONE MICRO-ELECTRONIC Co Ltd
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SHANGHAI CORE STONE MICRO-ELECTRONIC Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本实用新型公开一种双向ESD防护二极管的DFN封装结构。常规双向ESD防护二极管的芯片电极一个从正面引出,一个从背面引出,DFN封装时,芯片背面和框架用银胶连接,正面打金属线连接,此结构的局限性是芯片尺寸要小于框架尺寸,芯片需要减薄至150微米以下,且背面需要金属化,此实用新型结构,所使用的双向ESD防护二极管的芯片,其两个电极都从正面引出,两个电极都通过银胶和框架连接,芯片只需要使用单晶片制造,不再用外延片,降低成本;芯片厚度只需做到200微米,降低碎片率;背面无需金属化,减少工艺;芯片尺寸可以是原来的1.5‑2倍,给超低电容芯片、更强抗浪涌能力芯片提供了更多的设计空间。

Description

一种双向ESD防护二极管的DFN封装结构
技术领域
本实用新型属于一种DFN封装结构,适用于双向ESD防护二极管的DFN封装。
背景技术
半导体电路集成度不断提高,ESD防护二极管的封装尺寸也随之变小,从原来的SOD523、SOD723到SOD923,再到DFN1006、DFN0603、 DFN0201,乃至将来的CSP封装,封装尺寸不断在缩小,但是对ESD防护二极管的性能要求却越来越高,抗浪涌能力,低电容,低电压等等参数标准不断提升,怎么样在更小的芯片上实现更强大的功能逐渐成为难题,由于最开始的ESD防护二极管是用在SOD523,SOD723封装上的,发展到后来,DFN封装仍然延续了SOD封装的工艺,即背面银胶连接,正面打金属线连接,目的是不改变最开始芯片的设计,随着封装尺寸变的越来越小,当到达DFN0603封装时,打线工艺已经占去了1/4的封装体高度空间,产生很多工艺上的难题,芯片厚度需要做到小于100微米,芯片尺寸也要做到小于200微米×200微米,芯片的成品率下降,封装的成品率同时也在下降。本实用新型的封装结构,两个芯片电极都是从正面引出,两个电极都通过银胶和框架连接,抛弃了正面打线工艺,芯片厚度只需做到200微米,而且省去了背面金属化,此结构提升了芯片成品率,提升了封装成品率,减少了芯片制造工艺,最重要的是芯片尺寸可以是原来的1.5-2倍,为超低电容产品、更强抗浪涌能力产品提供更大的芯片设计空间。
发明内容
1、一种双向ESD防护二极管的DFN封装结构,其结构包括:DFN框架上(105)连接银胶(104),银胶连接芯片电极(103),两个芯片电极都是从芯片(102)正面引出,芯片厚度小于200微米。
附图说明
图1:双向ESD防护二极管的DFN封装的截面图。
编号说明
101:DFN封装体;
102:双向ESD防护二极管芯片,厚度小于200微米;
103:芯片电极,金属,一般情况下是铝或者银,不局限于铝和银;
104:银胶,导电的胶状物,内含有银粉成分,高温固化;
105:框架,金属,一般情况下是铜,不局限于铜。
具体实施方式
1.芯片划片及倒片,芯片背面贴蓝膜,用划片机将整个的晶圆芯片,切割成单个芯片,切割完成后,用倒片机,将蓝膜上的芯片倒到另外一张蓝膜上,此时芯片的正面与蓝膜接触。
2.芯片与框架连接,用点胶机将银胶点到框架上,固晶机将单个芯片从蓝膜上取下,放在银胶上,芯片电极和银胶连接,进入固化炉固化。
3.塑封,将载有芯片的框架,放入塑封机进行塑封。
4.电镀,将漏在外部的框架电镀,一般镀银或者金。
5.塑封切割,将整个塑封模块切割成单个的DFN封装体。
6.测试包装。
通过上述实施例阐述了本实用新型,同时也可以采用其它实施例实现本实用新型,本实用新型不局限于上述具体实施例,因此本实用新型由所附权利要求范围限定。

Claims (1)

1.一种双向ESD防护二极管的DFN封装结构,其结构包括:DFN封装体(101)的框架(105)上连接银胶(104),银胶连接芯片电极(103),两个芯片电极都是从芯片(102)正面引出,芯片厚度小于200微米。
CN201621316409.5U 2016-12-02 2016-12-02 一种双向esd防护二极管的dfn封装结构 Active CN206250175U (zh)

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