CN204809217U - 一种碳化硅二极管的封装框架 - Google Patents

一种碳化硅二极管的封装框架 Download PDF

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CN204809217U
CN204809217U CN201520538369.8U CN201520538369U CN204809217U CN 204809217 U CN204809217 U CN 204809217U CN 201520538369 U CN201520538369 U CN 201520538369U CN 204809217 U CN204809217 U CN 204809217U
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李安
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Zibo Micro Commerical Components Corp
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
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    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4809—Loop shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/73265—Layer and wire connectors

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Abstract

一种碳化硅二极管的封装框架，属于半导体器件制造设备领域。包括框架主体（1）和引脚（6），其特征在于：所述的框架主体（1）的前部设为辅助区，框架主体（1）的后部设固晶区（2），在固晶区（2）上通过焊膏层（3）焊接的方式将碳化硅晶粒（4）固定于框架上，采用铜丝（5）将碳化硅晶粒（4）与相应的引脚（6）键合焊接固定。本实用新型提高连接引线的耐高温能力和传导能力，避免了铝丝与碳化硅晶粒或引脚焊接时的虚焊，提高生产成品率，扩大了碳化硅二极管晶粒可耐高温特性的应用面。

Description

一种碳化硅二极管的封装框架
技术领域
一种碳化硅二极管的封装框架，属于半导体器件制造设备领域。
背景技术
随着微电子技术的发展，传统的硅和砷化镓半导体材料出于本身结构和特性的原因，在高温、高频、光电，大功率及抗辐射等方面越来越显示出其不足和局限性。众所周知，硅器件难以在PN结温高于150℃的情况下正常工作，特别是当高的工作温度、大功率、高频、及强辐射环境条件下并存时，硅器件就无法“胜任”。
碳化硅具有禁带宽度大，击穿电场高，电子饱和漂移速度高，热导率大等良好特性，这就决定了它具有在高温、高电压、高频等条件下工作的良好性质。但是传统二极管封装焊接主要采用金属支架焊接或铝丝键合焊接工艺，且碳化硅二极管晶粒结温可以到300℃~400℃仍能正常工作，而传统的焊接工艺熔点为200℃~300℃，且导电胶散热性能差，大大限制了碳化硅二极管器件的高温应用领域。
实用新型内容
本实用新型要解决的技术问题是：克服现有技术的不足，提供一种晶粒与引脚连接引线耐高温的碳化硅二极管的封装框架。
本实用新型解决其技术问题所采用的技术方案是：该碳化硅二极管的封装框架，包括框架主体和引脚，其特征在于：所述的框架主体的前部设为辅助区，框架主体的后部设固晶区，在固晶区上设有通过焊膏层焊接的方式将碳化硅晶粒固定于框架上，采用铜丝分别将碳化硅晶粒与相应的引脚键合焊接固定。
本实用新型在碳化硅二极管封装制作中，可采用铜丝超声键合工艺，在室温下仅在施加压力的同时，通过超声振动，分别完成铜丝与碳化硅晶粒和引脚键合焊接。提高连接引线的耐高温能力和传导能力，避免了传统的铝丝与铜引脚键合时材质不同导致的虚焊，提高产品生产良率，扩大了碳化硅二极管晶粒可耐高温特性的应用面。
所述的焊膏层为固晶区与碳化硅晶粒通过纳米银膏焊接后形成的纳米银膏焊接层。传统方法中用锡铅钎料在高温并充氮气的隧道炉下完成晶粒与金属支架连接，铅及其化合物对自然环境污染严重，对产线员工身体有损害。本实用新型首先用丝网印刷机将纳米银膏注射于铜料片上，再用自动贴片机将碳化硅晶粒粘接在纳米银膏上，用夹具固定后送真空焊接炉在高温下抽真空烧结，完成碳化硅晶粒焊接。纳米银膏不但导电效率更高，熔点也更高，利用纳米银膏焊接方式连接框架主体与晶粒，使产品具有耐高温、焊接良率高等优点。
所述的框架主体和引脚均为铜质。本身耐高温能力更强，焊接更牢固。
所述的固晶区上左右对称各焊接有一个碳化硅晶粒，采用铜丝分别将两个碳化硅晶粒与相应的引脚连接。
所述的固晶区上仅焊接有一个碳化硅晶粒，碳化硅晶粒通过铜丝分别连接至左右引脚。
根据碳化硅二极管的具体功能要求可以设计一个或二个碳化硅晶粒，均可采用铜丝将其与引脚相焊接，铜丝焊接牢固、传导能力更强，散热更快，能够承受更大的晶粒密度。
所述的辅助区为开有散热孔的散热区。实现良好的散热，保证碳化硅二极管的功能稳定。所述的辅助区为具有固定结构的固定区。实现碳化硅二极管的固定式辅助区的传统功能，可采用传统设计。辅助区在利用黑胶封装后仍保留在胶块外，以完成其辅助功能。
与现有技术相比，本实用新型的碳化硅二极管的封装框架所具有的有益效果是：本实用新型采用纳米银焊膏将碳化硅晶粒固定于铜框架主体上，真空焊接炉在高温下抽真空烧结，完成碳化硅晶粒在铜框架主体上的固定，采用铜丝键合工艺完成碳化硅晶粒和引脚的连接，使用耐高温环氧树脂材料进行塑封成型制得。具体具有以下优点：
1、本实用新型利用纳米银焊膏的颗粒尺寸小、比表面积大、表面性能高等特性，实现低温封装、高温服役的电子封装。真空焊接炉保证了焊接空洞率＜2%；
2、封装材料耐高温，银和铜的熔点均为1000℃左右，远大于碳化硅二极管的工作结温，且有很好的导电性和导热性，能承受更高温度的工作环境；
3、银和铜的电阻率低于锡和铝，降低了器件的封装电阻；
4、利用铜丝替代铝丝，解决了铝丝与铜框架主体不同材质焊接易虚焊的问题，提高了封装的可靠性。
附图说明
图1为本实用新型的一种碳化硅二极管的封装框架的俯视结构示意图。
图2为本实用新型的一种碳化硅二极管的封装框架的左视结构示意图。
其中，1、框架主体2、固晶区3、焊膏层4、碳化硅晶粒5、铜丝6、引脚。
具体实施方式
图1、2是本实用新型的最佳实施例，下面结合附图1、2对本实用新型做进一步说明。
参照附图1、2：本实用新型的一种碳化硅二极管的封装框架，包括框架主体1、固晶区2、焊膏层3、碳化硅晶粒4、铜丝5和引脚6；框架主体1的前部为散热区或固定区，框架主体1的后部设为固晶区2，固晶区2上左右对称各设一矩形的焊膏层3，焊膏层3为纳米银膏焊接层，能提高焊接点的耐受温度，能够适应更高的工作环境，焊膏层3上焊接有碳化硅晶粒4，碳化硅晶粒4通过各自连接的铜丝5连接相应的引脚6，利用铜丝5提高与碳化硅晶粒4和引脚6的导电效率，减少放热，同时提高耐受温度；框架主体1和引脚6均为铜质。
其他实施方式1：基本结构和连接关系同上述附图1、2所示，不同的是固晶区2上设有一个焊膏层3，焊膏层3上焊接有一个碳化硅晶粒4和分别与左右引脚连接的铜丝5。
其他实施方式2：基本结构和连接关系同上述附图1、2所示，不同的是焊膏层3的纳米银膏全部利用锡铅钎料替代。
本实用新型的制作工艺为：
1）晶粒切割：先将整晶圆贴在UV膜上，使用激光切割机沿晶粒切割道位置划开碳化硅晶粒，取出用纯水清洗碳化硅晶粒4表面并甩干；此过程中使用的UV膜粘度很大，在5000mN~12000mN，方便晶粒切割及清洗，不会出现晶粒移位、碰伤情况；
2）丝网印刷：用丝网印刷机将纳米银膏均匀刷在铜框架上的固晶区2内得到焊膏层3；
3）固晶：用固晶机将碳化硅晶粒4从UV光照射过的UV膜上吸取并放置在铜质的框架主体1上；UV在光照之后，粘度变低，会降到1000mN左右，固晶制作晶粒时吸取容易，不易粘连残胶降低焊接良率，提高了封装可靠性；
4）真空焊接：将黏着碳化硅晶粒4的铜质的框架主体1放入真空焊接炉冷却区中，抽真空到50MPa时再充氮气，预热到220~250℃时将焊接材料转移到加热区，加热区升温至最高温度290℃左右时滞留10~15min确保粘接强度，材料转移至冷却区约200℃进行冷却，完成碳化硅晶粒4和铜质的框架主体1的焊接；
5）铜丝键合：采用超声铜丝键合工艺实现碳化硅晶粒4和引脚6的连接，室温下在键合工具超声震动和键合压力（键合功率约为4~6N）的作用下，铜丝5分别与碳化硅晶粒4和引脚6上的焊接点在摩擦力的作用下暴露出纯净的金属表面，并发生强烈的原子扩散和塑性流动，使铜丝5和焊接点相互粘合而形成键合；
6）塑封成型：成型机台上下模温度160~180℃，将材料整齐摆放在载料架上，放入成型机台（上下模温度160~180℃）上合模（合模压力80~120Kg/cm2），放入已预热的黑胶块，再转进30~50Kg/cm2压力条件下约180s，完成塑封成型，压模后材料需烘烤4~8小时。
以上所述，仅是本实用新型的较佳实施例而已，并非是对本实用新型作其它形式的限制，任何熟悉本专业的技术人员可能利用上述揭示的技术内容加以变更或改型为等同变化的等效实施例。但是凡是未脱离本实用新型技术方案内容，依据本实用新型的技术实质对以上实施例所作的任何简单修改、等同变化与改型，仍属于本实用新型技术方案的保护范围。

Claims (5)

1.一种碳化硅二极管的封装框架，包括框架主体（1）和引脚（6），其特征在于：所述的框架主体（1）的前部设为辅助区，框架主体（1）的后部设固晶区（2），在固晶区（2）上设有通过焊膏层（3）焊接的方式将碳化硅晶粒（4）固定于框架上，采用铜丝（5）将碳化硅晶粒（4）与相应的引脚（6）键合焊接固定。
2.根据权利要求1所述的一种碳化硅二极管的封装框架，其特征在于：所述的框架主体（1）和引脚（6）均为铜质。
3.根据权利要求1所述的一种碳化硅二极管的封装框架，其特征在于：所述的固晶区（2）上左右对称各焊接有一个碳化硅晶粒（4），采用铜丝（5）分别将两个碳化硅晶粒（4）与相应的引脚（6）连接。
4.根据权利要求1所述的一种碳化硅二极管的封装框架，其特征在于：所述的固晶区（2）上仅焊接有一个碳化硅晶粒（4），碳化硅晶粒（4）通过铜丝（5）分别连接至左右引脚（6）。
5.根据权利要求1所述的一种碳化硅二极管的封装框架，其特征在于：所述的辅助区为开有散热孔的散热区。
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Cited By (1)

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Publication number Priority date Publication date Assignee Title
CN114300561A (zh) * 2021-12-24 2022-04-08 安徽钜芯半导体科技有限公司 一种高性能光伏模块芯片的加工工艺

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114300561A (zh) * 2021-12-24 2022-04-08 安徽钜芯半导体科技有限公司 一种高性能光伏模块芯片的加工工艺
CN114300561B (zh) * 2021-12-24 2023-05-02 安徽钜芯半导体科技有限公司 一种高性能光伏模块芯片的加工工艺

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