CN203415571U - 一种sop-8l封装引线框架 - Google Patents

一种sop-8l封装引线框架 Download PDF

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CN203415571U
CN203415571U CN201320413140.2U CN201320413140U CN203415571U CN 203415571 U CN203415571 U CN 203415571U CN 201320413140 U CN201320413140 U CN 201320413140U CN 203415571 U CN203415571 U CN 203415571U
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sop
island
frame
chip
dao
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侯友良
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WUXI RED MICROELECTRONICS CO Ltd
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WUXI RED MICROELECTRONICS CO Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

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Abstract

本实用新型提供了一种SOP-8L封装引线框架，其使得一个器件内能够同时封装两个相关联芯片，无需外部连线，使得性能稳定，且使得产品芯片的封装小型化、微型化得以实现，一个器件同时也降低了成本。其包括框架、基岛、外引脚，所述框架的中心位置设置有基岛，所述框架的其中一对侧分别设置有外引脚，其特征在于：所述框架的中心位置设置有两个基岛，装于所述基岛上的芯片通过内引线分别连接对应的外引脚。

Description

一种SOP-8L封装引线框架
技术领域
    本实用新型涉及半导体封装的技术领域，具体为一种SOP-8L封装引线框架。
背景技术
标准的SOP-8L封装型式的引线框架为单基岛，其基岛的中心位置放置有一个芯片，但是，伴随着产品的不断复杂化，现有的产品出现了同时关联两个芯片的情况，现有的封装结构只能分别封装成两个器件，再通过外部连线组成，由于使用了外部连线，使得性能稳定性差；且由于使用了两个封装器件，其使得产品的芯片封装体积大，且增加了成本。
发明内容
针对上述问题，本实用新型提供了一种SOP-8L封装引线框架，其使得一个器件内能够同时封装两个相关联芯片，无需外部连线，使得性能稳定，且使得产品芯片的封装小型化、微型化得以实现，一个器件同时也降低了成本。
一种SOP-8L封装引线框架，其技术方案是这样的：其包括框架、基岛、外引脚，所述框架的中心位置设置有基岛，所述框架的其中一对侧分别设置有外引脚，其特征在于：所述框架的中心位置设置有两个基岛，装于所述基岛上的芯片通过内引线分别连接对应的外引脚。
其进一步特征在于：所述框架的其中一对侧分别设置有四个外引脚，其中一侧的四个外引脚分别和两个基岛的对应位置的对应侧相连通，另一侧的四个外引脚分别和两个基岛的对应位置的对应侧相互隔断；
所述芯片可通过绝缘胶装于所述基岛；
所述芯片可通过导电胶装于所述基岛；
两块所述芯片之间通过内引线键合连接。
采用本实用新型后，标准的SOP-8L封装引线框架的中心位置的基岛被分隔成两个基岛，基岛上可设置两块芯片，芯片通过内引线分别连接外引脚，之后完成对芯片的封装，其使得一个器件内能够同时封装两个相关联芯片，且无需外部连线，使得性能稳定，且使得产品芯片的封装小型化、微型化得以实现，一个器件同时也降低了成本。
附图说明
图1是本实用新型的结构示意图。
具体实施方式
见图1，其包括框架1、基岛、外引脚2，框架1的上下侧分别设置有四个外引脚2，框架1的中心位置设置有左右两个基岛，分别为左基岛3、右基岛4，左基岛3的上部连通上侧的左侧的两个外引脚2、并和下侧的左侧的两个外引脚2相互隔断，右基岛4的上部连通上侧的右侧的两个外引脚2、并和下侧的右侧的两个外引脚2相互隔断，左芯片5通过绝缘胶装于左基岛3上，右芯片6通过导电胶装于右基岛4上，左芯片5、右芯片6间通过内引线7键合连接，左芯片5通过内引线7连接至对应的外引脚3，右芯片6由于采用导电胶装于右基岛4，故其直接和右基岛4相连通的外引脚3相连接，右芯片6通过内引线7连接至其余外引脚3。

Claims (5)

1.一种SOP-8L封装引线框架，其包括框架、基岛、外引脚，所述框架的中心位置设置有基岛，所述框架的其中一对侧分别设置有外引脚，其特征在于：所述框架的中心位置设置有两个基岛，装于所述基岛上的芯片通过内引线分别连接对应的外引脚。
2.根据权利要求1所述的一种SOP-8L封装引线框架，其特征在于：所述框架的其中一对侧分别设置有四个外引脚，其中一侧的四个外引脚分别和两个基岛的对应位置的对应侧相连通，另一侧的四个外引脚分别和两个基岛的对应位置的对应侧相互隔断。
3.根据权利要求2所述的一种SOP-8L封装引线框架，其特征在于：所述芯片可通过绝缘胶装于所述基岛。
4.根据权利要求2所述的一种SOP-8L封装引线框架，其特征在于：所述芯片可通过导电胶装于所述基岛。
5.根据权利要求1至4中任一权利要求所述的一种SOP-8L封装引线框架，其特征在于：两块所述芯片之间通过内引线键合连接。
CN201320413140.2U 2013-07-12 2013-07-12 一种sop-8l封装引线框架 Expired - Lifetime CN203415571U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103337489A (zh) * 2013-07-12 2013-10-02 无锡红光微电子有限公司 一种sop-8l封装引线框架

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103337489A (zh) * 2013-07-12 2013-10-02 无锡红光微电子有限公司 一种sop-8l封装引线框架

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