CN202454612U - Chip packaging structure - Google Patents

Chip packaging structure Download PDF

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Publication number
CN202454612U
CN202454612U CN 201220038826 CN201220038826U CN202454612U CN 202454612 U CN202454612 U CN 202454612U CN 201220038826 CN201220038826 CN 201220038826 CN 201220038826 U CN201220038826 U CN 201220038826U CN 202454612 U CN202454612 U CN 202454612U
Authority
CN
China
Prior art keywords
substrate
heat
metal sheet
wafer
dissipating metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 201220038826
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Chinese (zh)
Inventor
袁永刚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Dongshan Precision Manufacturing Co Ltd
Original Assignee
Suzhou Dongshan Precision Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Dongshan Precision Manufacturing Co Ltd filed Critical Suzhou Dongshan Precision Manufacturing Co Ltd
Priority to CN 201220038826 priority Critical patent/CN202454612U/en
Application granted granted Critical
Publication of CN202454612U publication Critical patent/CN202454612U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model provides a chip packaging structure. The chip packaging structure comprises a radiating metal plate at a bottom layer, a BT substrate attached to the radiating metal plate, and a wafer attached to the radiating metal plate, wherein a coating is formed on the surface of the BT substrate, and the wafer is electrically connected with the coating on the surface of the BT substrate through a gold thread.

Description

Chip-packaging structure
[technical field]
The utility model is about the semiconductor chip field, particularly about the encapsulating structure and the method thereof of led chip.
[background technology]
The light-emitting diode of current trend (LED), because advantages such as its high radiance, low-power consumption are used widely, but the caloric value of LED wafer is very big; Get over high-power LED; Caloric value is big more, if can not solve the heat dissipation problem of LED wafer well, LED just can not accomplish high-power.
As shown in Figure 1; Traditional led chip encapsulation is that wafer 10 directly is fixed on the substrate 11 (such as aluminium base or ceramic substrate); Be formed with printed circuit (not shown) on the substrate 11, wafer 10 electrically connects through the printed circuit on gold thread 12 and the substrate 11, and thermoelectricity is not realized separating; Lean on substrate heat radiation itself fully, it is bigger that power can not be done.
Development afterwards has the wafer carrier of thermoelectric separate type, through the mode that thermoelectricity separates, can dispel the heat to the heating of wafer well.The wafer carrier of existing a kind of thermoelectric separate type is on heat-radiating substrate, to form dielectric layer through the mode that transforms lining (Conversion Coating) earlier; Wafer is connected through the layer that electrically conducts on gold thread and the dielectric layer then; The dielectric layer manufacturing process that forms like this is complicated, and cost is higher.
Therefore be necessary existing technology is improved, to overcome aforesaid defective.
[utility model content]
The purpose of the utility model is to provide a kind of chip-packaging structure, and its thermal diffusivity is good, and is easy to assembly.
For reaching aforementioned purpose; A kind of chip-packaging structure of the utility model; It comprises bottom heat-dissipating metal sheet, be attached at BT substrate on the heat-dissipating metal sheet, be attached at the wafer on the heat-dissipating metal sheet; Surface at the BT substrate is formed with coating, and wafer electrically connects through the coating of gold thread and BT substrate surface.
According to an embodiment of the utility model, said BT substrate is an annular, and said wafer is positioned at annular BT substrate.
According to an embodiment of the utility model, said BT substrate is to be attached on the said heat-dissipating metal sheet through double faced adhesive tape.
According to an embodiment of the utility model, said wafer is to be fixed on the said heat-dissipating metal sheet through heat-conducting glue.
According to an embodiment of the utility model, said heat-dissipating metal sheet is oval, and said BT substrate is an oval ring.
According to an embodiment of the utility model, said heat-dissipating metal sheet is circular, square, and said BT substrate is annular, side's annular.
Than prior art, the chip-packaging structure of the utility model, wafer directly are attached on the heat-dissipating metal sheet; The heat of wafer can directly shed, and can make high-power LED, and the joint temperature is little; Light decay is little, and BT substrate and heat-dissipating metal sheet adopt the mode of directly fitting, and manufacture craft is simple.
[description of drawings]
Fig. 1 is the existing chip packaged type.
Fig. 2 is the chip-packaging structure sketch map of the utility model.
Fig. 3 is the structural representation of the BT substrate of the utility model.
Fig. 4 is the flow chart of the chip packaging method of the utility model.
[embodiment]
Alleged here " embodiment " or " embodiment " are meant special characteristic, structure or the characteristic that can be contained at least one implementation of the utility model.Different in this manual local " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or optionally mutually exclusive with other embodiment embodiment.
See also shown in Figure 2ly, it shows the chip-packaging structure sketch map of the utility model.Shown in figure; The chip-packaging structure of the utility model comprises heat-dissipating metal sheet 21, (Bismaleimide Triazine is called for short BT to be attached at BT substrate 22 on the heat-dissipating metal sheet 21; Also claim BT resin substrate material), fixedly be attached at the wafer 24 on the heat-dissipating metal sheet 21 through heat-conducting glue 23; Wherein form conductive coating (not shown) on the BT substrate 22, the circuit on the wafer 24 electrically connects through the coating on gold thread 25 and the BT substrate 22.
See also shown in Figure 3; The shape of heat-dissipating metal sheet 21 and BT substrate 22 among the embodiment of its demonstration the utility model; In this embodiment, packaged wafer 24 is LED (light-emitting diode) wafer, and said heat-dissipating metal sheet 21 is oval sheet material; Said BT substrate 22 is an oval ring, forms the pad 221 of a circle respectively at the oval two ends of BT substrate 22.Please combine shown in Figure 2; In the time of encapsulation; Oval ring substrate 22 usefulness double faced adhesive tapes (not shown) are pasted on the heat-dissipating metal sheet 21; Two LED wafers 24 are positioned in the middle of the oval ring substrate 22, and two LED wafers 24 are directly fixed on the heat-dissipating metal sheet 21 through heat-conducting glue 23, and a wafer 24 in left side is connected with the solder joint 221 of oval substrate 22 upper left sides through gold thread 25; The wafer 24 on right side is connected through the solder joint 221 on right side on gold thread 25 and the oval substrate 22, also passes through gold thread 25 connections between two wafers.
In an embodiment of the utility model, said heat-dissipating metal sheet can be the substrate of aluminium sheet or copper coin or various alloys.
In an embodiment of the utility model, said BT substrate is to be pasted on the heat-dissipating metal sheet through double faced adhesive tape, but in other embodiments, and said BT substrate also can be attached on the heat-dissipating metal sheet through welding or glue or other modes.
In an embodiment of the utility model, said heat-dissipating metal sheet is oval, and said BT substrate is an oval ring, but in other embodiments, and said heat-dissipating metal sheet also can be circle, square etc., and said BT substrate also can be annular, square annular etc.The Chip Packaging mode of the utility model, wafer directly is attached on the heat-dissipating metal sheet, and heat directly sheds, and can make high-power LED, and the joint temperature is little, and light decay is little.
See also shown in Figure 4ly, it shows the method for the Chip Packaging of the utility model, and according to an embodiment of the utility model, the chip packaging method of the utility model comprises the steps:
Step S1: one deck heat-dissipating metal sheet is provided; Said heat-dissipating metal sheet can be the substrate of aluminium sheet or copper coin or various alloys.In an embodiment of the utility model, said heat-dissipating metal sheet is oval-shaped metallic plate.
Step S2: on heat-dissipating metal sheet, attach one deck BT substrate, wherein the upper surface of BT substrate is formed with coating; In an embodiment of the utility model, said BT substrate is an oval ring, on the BT substrate, electroplates one deck conductive layer, wherein forms the pad of a circle respectively at the oval two ends of BT substrate.Be pasted on the heat-dissipating metal sheet with double faced adhesive tape at oval ring BT substrate described in the embodiment of the utility model, but in other embodiments, also can use welding or glue or other modes that said BT substrate is attached on the said heat-dissipating metal sheet.
Step S3: use heat-conducting glue fixed wafer on heat-dissipating metal sheet; In an embodiment of the utility model, said wafer is two LED wafers, and two LED wafers are directly fixed on the middle heat-dissipating metal sheet of oval ring BT substrate through heat-conducting glue.
Step S4: electrically connect through the coating of gold thread with wafer and BT substrate surface.As shown in Figure 1, a wafer in left side is connected with the solder joint of oval substrate upper left side through gold thread in an embodiment of the utility model, and a wafer on right side is connected with the solder joint of oval substrate upper left side through gold thread.
Certainly, can also comprise that in the encapsulation step of chip follow-up glue envelope waits other steps, the utility model specifies no longer one by one.
The chip packaging method of the utility model, wafer directly are attached on the heat-dissipating metal sheet, and the heat of wafer can directly shed, and BT substrate and heat-dissipating metal sheet adopt the mode of directly fitting, and manufacture craft is simple.
Above-mentioned explanation has fully disclosed the embodiment of the utility model.It is pointed out that any change that the technical staff that is familiar with this field does the embodiment of the utility model does not all break away from the scope of claims of the utility model.Correspondingly, the scope of the claim of the utility model also is not limited only to previous embodiment.

Claims (6)

1. chip-packaging structure; It comprises bottom heat-dissipating metal sheet, be attached at BT substrate on the heat-dissipating metal sheet, be attached at the wafer on the heat-dissipating metal sheet; Surface at the BT substrate is formed with coating, and wafer electrically connects through the coating of gold thread and BT substrate surface.
2. chip-packaging structure as claimed in claim 1 is characterized in that: said BT substrate is an annular, and said wafer is positioned at annular BT substrate.
3. chip-packaging structure as claimed in claim 1 is characterized in that: said BT substrate is to be attached on the said heat-dissipating metal sheet through double faced adhesive tape.
4. chip-packaging structure as claimed in claim 1 is characterized in that: said wafer is to be fixed on the said heat-dissipating metal sheet through heat-conducting glue.
5. chip-packaging structure as claimed in claim 1 is characterized in that: said heat-dissipating metal sheet is for oval, and said BT substrate is an oval ring.
6. chip-packaging structure as claimed in claim 1 is characterized in that: said heat-dissipating metal sheet is for circular, square, and said BT substrate is annular, side's annular.
CN 201220038826 2012-02-07 2012-02-07 Chip packaging structure Expired - Fee Related CN202454612U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220038826 CN202454612U (en) 2012-02-07 2012-02-07 Chip packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220038826 CN202454612U (en) 2012-02-07 2012-02-07 Chip packaging structure

Publications (1)

Publication Number Publication Date
CN202454612U true CN202454612U (en) 2012-09-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201220038826 Expired - Fee Related CN202454612U (en) 2012-02-07 2012-02-07 Chip packaging structure

Country Status (1)

Country Link
CN (1) CN202454612U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102903709A (en) * 2012-10-25 2013-01-30 苏州东山精密制造股份有限公司 COB (Chip on Board) LED module and manufacturing method thereof
CN103247751A (en) * 2012-02-07 2013-08-14 苏州东山精密制造股份有限公司 Chip packaging structure and chip packaging method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103247751A (en) * 2012-02-07 2013-08-14 苏州东山精密制造股份有限公司 Chip packaging structure and chip packaging method thereof
CN102903709A (en) * 2012-10-25 2013-01-30 苏州东山精密制造股份有限公司 COB (Chip on Board) LED module and manufacturing method thereof

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120926

Termination date: 20180207

CF01 Termination of patent right due to non-payment of annual fee