CN103247751A - Chip packaging structure and chip packaging method thereof - Google Patents

Chip packaging structure and chip packaging method thereof Download PDF

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Publication number
CN103247751A
CN103247751A CN2012100266487A CN201210026648A CN103247751A CN 103247751 A CN103247751 A CN 103247751A CN 2012100266487 A CN2012100266487 A CN 2012100266487A CN 201210026648 A CN201210026648 A CN 201210026648A CN 103247751 A CN103247751 A CN 103247751A
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CN
China
Prior art keywords
substrate
heat
metal sheet
dissipating metal
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2012100266487A
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Chinese (zh)
Inventor
袁永刚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Dongshan Precision Manufacturing Co Ltd
Original Assignee
Suzhou Dongshan Precision Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Dongshan Precision Manufacturing Co Ltd filed Critical Suzhou Dongshan Precision Manufacturing Co Ltd
Priority to CN2012100266487A priority Critical patent/CN103247751A/en
Publication of CN103247751A publication Critical patent/CN103247751A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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  • Led Device Packages (AREA)

Abstract

The invention provides a chip packaging structure and a chip packaging method thereof. The chip packaging structure comprises a metal heating panel on the bottom layer, BT (Bismaleimide Triazine) substrates attached to the metal heating panel, and wafers attached to the metal heating panel, wherein clad layers are formed on the surfaces of the BT substrates; and the wafers are electrically connected with the clad layers on the surfaces of the BT substrates through gold wires.

Description

Chip-packaging structure and method thereof
[technical field]
The invention relates to the semiconductor chip field, particularly about encapsulating structure and the method thereof of led chip.
[background technology]
The light-emitting diode of current trend (LED), because advantages such as its high radiance, low-power consumption are used widely, but the caloric value of LED wafer is very big, get over high-power LED, caloric value is more big, if can not solve the heat dissipation problem of LED wafer well, LED just can not accomplish high-power.
As shown in Figure 1, traditional led chip encapsulation is that wafer 10 directly is fixed on the substrate 11 (such as aluminium base or ceramic substrate), be formed with printed circuit (not shown) on the substrate 11, wafer 10 electrically connects by the printed circuit on gold thread 12 and the substrate 11, thermoelectricity is not realized separating, by substrate heat radiation itself, it is bigger that power can not be done fully.
Development afterwards has the wafer carrier of thermoelectric separate type, by the mode that thermoelectricity separates, can dispel the heat to the heating of wafer well.The wafer carrier of existing a kind of thermoelectric separate type is to form dielectric layer by the mode that transforms lining (Conversion Coating) at heat-radiating substrate earlier, wafer is connected by the layer that electrically conducts on gold thread and the dielectric layer then, the dielectric layer manufacturing process complexity of Xing Chenging like this, cost is higher.
Therefore be necessary existing technology is improved, to overcome aforesaid defective.
[summary of the invention]
The object of the present invention is to provide a kind of chip-packaging structure, its thermal diffusivity is good, and is easy to assembly.
Another object of the present invention is to provide a kind of chip packaging method, adopt the chip technology of this method encapsulation simple, thermal diffusivity is good.
For reaching aforementioned purpose, a kind of chip-packaging structure of the present invention, it comprise bottom heat-dissipating metal sheet, be attached at BT substrate on the heat-dissipating metal sheet, be attached at the wafer on the heat-dissipating metal sheet, surface at the BT substrate is formed with coating, and wafer electrically connects by the coating of gold thread and BT substrate surface.
According to one embodiment of present invention, described BT substrate is annular, and described wafer is positioned at annular BT substrate.
According to one embodiment of present invention, described BT substrate is to be attached on the described heat-dissipating metal sheet by double faced adhesive tape.
According to one embodiment of present invention, described wafer is to be fixed on the described heat-dissipating metal sheet by heat-conducting glue.
For reaching aforementioned another purpose, a kind of chip packaging method of the present invention, it comprises:
One deck heat-dissipating metal sheet is provided;
Attach one deck BT substrate at heat-dissipating metal sheet, wherein the upper surface of BT substrate is formed with coating;
Use heat-conducting glue fixed wafer on heat-dissipating metal sheet;
Electrically connect by the coating of gold thread with wafer and BT substrate surface.
According to one embodiment of present invention, described BT substrate is annular, and described wafer is positioned at annular BT substrate.
According to one embodiment of present invention, described BT substrate is to be attached on the described heat-dissipating metal sheet by double faced adhesive tape.
Than prior art, chip-packaging structure of the present invention and method thereof, wafer directly is attached on the heat-dissipating metal sheet, the heat of wafer can directly shed, and can make high-power LED, and the joint temperature is little, light decay is little, and BT substrate and heat-dissipating metal sheet adopt the mode of directly fitting, and manufacture craft is simple.
[description of drawings]
Fig. 1 is the existing chip packaged type.
Fig. 2 is chip-packaging structure schematic diagram of the present invention.
Fig. 3 is the structural representation of BT substrate of the present invention.
Fig. 4 is the flow chart of chip packaging method of the present invention.
[embodiment]
Alleged " embodiment " or " embodiment " refers to be contained in special characteristic, structure or the characteristic at least one implementation of the present invention herein.Different local in this manual " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.
See also shown in Figure 2ly, it shows chip-packaging structure schematic diagram of the present invention.As shown in FIG., chip-packaging structure of the present invention comprises heat-dissipating metal sheet 21, (Bismaleimide Triazine is called for short BT to be attached at BT substrate 22 on the heat-dissipating metal sheet 21, also claim BT resin substrate material), fixedly be attached at wafer 24 on the heat-dissipating metal sheet 21 by heat-conducting glue 23, wherein form conductive coating (not shown) on the BT substrate 22, the circuit on the wafer 24 electrically connects by the coating on gold thread 25 and the BT substrate 22.
See also shown in Figure 3, the shape of heat-dissipating metal sheet 21 and BT substrate 22 in its demonstration one embodiment of the present of invention, in this embodiment, packaged wafer 24 is LED (light-emitting diode) wafer, described heat-dissipating metal sheet 21 is oval sheet material, described BT substrate 22 is oval ring, forms the pad 221 of a circle respectively at the oval two ends of BT substrate 22.Please in conjunction with shown in Figure 2, in the time of encapsulation, oval ring substrate 22 usefulness double faced adhesive tapes (not shown) are pasted on the heat-dissipating metal sheet 21, two LED wafers 24 are positioned in the middle of the oval ring substrate 22, two LED wafers 24 are directly fixed on the heat-dissipating metal sheet 21 by heat-conducting glue 23, a wafer 24 in left side is connected with the solder joint 221 of oval substrate 22 upper left sides by gold thread 25, the wafer 24 on right side is connected by the solder joint 221 on right side on gold thread 25 and the oval substrate 22, also passes through gold thread 25 connections between two wafers.
In one embodiment of the invention, described heat-dissipating metal sheet can be the substrate of aluminium sheet or copper coin or various alloys.
In one embodiment of the invention, described BT substrate is to be pasted on the heat-dissipating metal sheet by double faced adhesive tape, but in other embodiments, and described BT substrate also can be attached on the heat-dissipating metal sheet by welding or glue or other modes.
In one embodiment of the invention, described heat-dissipating metal sheet is oval, and described BT substrate is oval ring, but in other embodiments, and described heat-dissipating metal sheet also can be circle, square etc., and described BT substrate also can be annular, square annular etc.Chip packaged type of the present invention, wafer directly is attached on the heat-dissipating metal sheet, and heat directly sheds, and can make high-power LED, and the joint temperature is little, and light decay is little.
See also shown in Figure 4ly, it shows the method for chip of the present invention encapsulation, and according to one embodiment of present invention, chip packaging method of the present invention comprises the steps:
Step S1: one deck heat-dissipating metal sheet is provided; Described heat-dissipating metal sheet can be the substrate of aluminium sheet or copper coin or various alloys.In one embodiment of the invention, described heat-dissipating metal sheet is oval-shaped metallic plate.
Step S2: attach one deck BT substrate at heat-dissipating metal sheet, wherein the upper surface of BT substrate is formed with coating; In one embodiment of the invention, described BT substrate is oval ring, electroplates one deck conductive layer at the BT substrate, wherein forms the pad of a circle respectively at the oval two ends of BT substrate.Described oval ring BT substrate is pasted on the heat-dissipating metal sheet with double faced adhesive tape in one embodiment of the invention, but in other embodiments, also can use welding or glue or other modes that described BT substrate is attached on the described heat-dissipating metal sheet.
Step S3: use heat-conducting glue fixed wafer on heat-dissipating metal sheet; In one embodiment of the invention, described wafer is two LED wafers, and two LED wafers are directly fixed on the middle heat-dissipating metal sheet of oval ring BT substrate by heat-conducting glue.
Step S4: electrically connect by the coating of gold thread with wafer and BT substrate surface.As shown in Figure 1, Zuo Ce a wafer is connected by the solder joint of gold thread with oval substrate upper left side in one embodiment of the invention, and a wafer on right side is connected by the solder joint of gold thread with oval substrate upper left side.
Certainly, can also comprise that in the encapsulation step of chip follow-up glue envelope waits other steps, the present invention describes in detail no longer one by one.
Chip packaging method of the present invention, wafer directly are attached on the heat-dissipating metal sheet, and the heat of wafer can directly shed, and BT substrate and heat-dissipating metal sheet adopt the mode of directly fitting, and manufacture craft is simple.
Above-mentioned explanation has fully disclosed the specific embodiment of the present invention.It is pointed out that and be familiar with the scope that any change that the person skilled in art does the specific embodiment of the present invention does not all break away from claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to previous embodiment.

Claims (7)

1. chip-packaging structure, it comprise bottom heat-dissipating metal sheet, be attached at BT substrate on the heat-dissipating metal sheet, be attached at the wafer on the heat-dissipating metal sheet, surface at the BT substrate is formed with coating, and wafer electrically connects by the coating of gold thread and BT substrate surface.
2. chip-packaging structure as claimed in claim 1, it is characterized in that: described BT substrate is annular, described wafer is positioned at annular BT substrate.
3. chip-packaging structure as claimed in claim 1, it is characterized in that: described BT substrate is to be attached on the described heat-dissipating metal sheet by double faced adhesive tape.
4. chip-packaging structure as claimed in claim 1, it is characterized in that: described wafer is to be fixed on the described heat-dissipating metal sheet by heat-conducting glue.
5. chip packaging method, it is characterized in that: it comprises:
One deck heat-dissipating metal sheet is provided;
Attach one deck BT substrate at heat-dissipating metal sheet, wherein the upper surface of BT substrate is formed with coating;
Use heat-conducting glue fixed wafer on heat-dissipating metal sheet;
Electrically connect by the coating of gold thread with wafer and BT substrate surface.
6. chip packaging method as claimed in claim 5, it is characterized in that: described BT substrate is annular, described wafer is positioned at annular BT substrate.
7. chip packaging method as claimed in claim 5, it is characterized in that: described BT substrate is to be attached on the described heat-dissipating metal sheet by double faced adhesive tape.
CN2012100266487A 2012-02-07 2012-02-07 Chip packaging structure and chip packaging method thereof Pending CN103247751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012100266487A CN103247751A (en) 2012-02-07 2012-02-07 Chip packaging structure and chip packaging method thereof

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Application Number Priority Date Filing Date Title
CN2012100266487A CN103247751A (en) 2012-02-07 2012-02-07 Chip packaging structure and chip packaging method thereof

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CN103247751A true CN103247751A (en) 2013-08-14

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105977362A (en) * 2016-06-29 2016-09-28 山东浪潮华光光电子股份有限公司 High-efficiency heat-dissipation integrated LED packaging structure and method
CN106784254A (en) * 2017-01-20 2017-05-31 深圳市润芯科技有限公司 LED wafer packaging frame, component, technique and LED light source

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1815764A (en) * 2005-02-02 2006-08-09 银河制版印刷有限公司 Baseboard structure of luminous diode module
CN201655843U (en) * 2010-04-20 2010-11-24 杭州威利广光电科技股份有限公司 LED encapsulation structure
CN202120985U (en) * 2011-05-27 2012-01-18 深圳市晶台光电有限公司 Surface-mounting full-color LED
US20120025241A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led packaging structure and method based on a silicon substrate
CN202454612U (en) * 2012-02-07 2012-09-26 苏州东山精密制造股份有限公司 Chip packaging structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1815764A (en) * 2005-02-02 2006-08-09 银河制版印刷有限公司 Baseboard structure of luminous diode module
CN201655843U (en) * 2010-04-20 2010-11-24 杭州威利广光电科技股份有限公司 LED encapsulation structure
US20120025241A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led packaging structure and method based on a silicon substrate
CN202120985U (en) * 2011-05-27 2012-01-18 深圳市晶台光电有限公司 Surface-mounting full-color LED
CN202454612U (en) * 2012-02-07 2012-09-26 苏州东山精密制造股份有限公司 Chip packaging structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105977362A (en) * 2016-06-29 2016-09-28 山东浪潮华光光电子股份有限公司 High-efficiency heat-dissipation integrated LED packaging structure and method
CN106784254A (en) * 2017-01-20 2017-05-31 深圳市润芯科技有限公司 LED wafer packaging frame, component, technique and LED light source

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Application publication date: 20130814