CN1894784A - 防止在抗蚀剂剥离过程中对多孔低k材料的损伤的方法 - Google Patents
防止在抗蚀剂剥离过程中对多孔低k材料的损伤的方法 Download PDFInfo
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Abstract
提供了一种在多孔低K介电层内形成特征的方法。将多孔低K介电层置于衬底上。将图形化光致抗蚀剂掩膜置于该多孔低K介电层上。将特征蚀刻到该多孔低K介电层中。在蚀刻了该特征之后,在该特征上沉积保护层。剥离该图形化光致抗蚀剂掩膜,使得除去该保护层的一部分,其中由该保护层形成的保护壁保留在该特征中。
Description
技术领域
本发明涉及基于半导体的装置的制造。更为特别地,本发明涉及用于用多孔低K介电层来制造基于半导体的装置的改进技术。
背景技术
在基于半导体的装置(例如集成电路或平板显示器)制造中,双镶嵌结构可以结合铜导体被用于降低与在前代技术中所使用的基于铝的材料中的信号传播相关的RC延迟。在双镶嵌过程中,代替蚀刻导体材料,可将通路以及沟渠蚀刻到介电材料中并用铜填充。可通过化学机械抛光(CMP)除去过量的铜,留下通过通路连接的铜线以用于信号传输。为了更进一步降低RC延迟,可使用多孔低介电常数材料。这些多孔低介电常数材料可以包含多孔有机硅玻璃(OSG)材料。OSG材料可以是掺杂有诸如甲基的有机成分的二氧化硅。OSG材料可将碳和氢原子结合到二氧化硅晶格中,这降低材料的介电常数。然而,OSG材料在暴露于用于剥离光致抗蚀剂的O2、H2、和NH3气体中时可能容易受到损伤。多孔材料具有小孔,这些小孔允许剥离等离子体更深地进入层中,从而导致更大的损伤。
由于通过暴露于用于剥离抗蚀剂和侧壁的等离子体中来除去有机内容,所以多孔OSG材料可能非常容易受损伤。等离子体可以扩散到多孔OSG层的小孔内并导致直到进入邻接开口的OSG层内300nm的损伤。由等离子体导致的损伤的一部分是从损伤区域除去碳和氢,从而导致该OSG更像具有更高的介电常数的二氧化硅。可根据FTIR分析通过测量OSG层的SiC/SiO比例的变化来量化损伤。当移动到沟渠侧壁时,那意味着在2000沟渠壁的每一侧有几百埃的损伤。
理想的是降低在剥离工艺过程中对多孔低K介质层的损伤。
发明内容
为了实现根据本发明目的的前述及其它目标,提供了一种在多孔低K介电层内形成特征的方法。多孔低K介电层被置于衬底之上。图形化光致抗蚀剂掩膜被置于该多孔低K介电层之上。将特征蚀刻到该多孔低K介电层中。在蚀刻了该特征之后,在该特征上沉积保护层。剥离该图形化光致抗蚀剂掩膜,使得除去该保护层的一部分,其中由该保护层形成的保护壁的小部分保留在该特征内。
在本发明另一个表现形式中,提供了一种用于通过衬底上的掩膜在多孔低K介电层内蚀刻特征的设备。提供了等离子体处理腔,该处理腔包含形成等离子体处理腔围壁(enclosure)的腔壁、用于在该等离子体处理腔围壁内支承衬底的衬底支承装置、用于调节该等离子体处理腔围壁内的压力的压力调节器、用于向该等离子体处理腔围壁供电以维持等离子体的至少一个电极、用于将气体提供到该等离子体处理腔围壁内的气体入口、以及用于从该等离子体处理腔围壁中排出气体的气体出口。气体源与该气体入口流体连接。控制器可控制地连接到气体源、至少一个电极、压力调节器、气体入口、以及气体出口中的至少一个上。该控制器包含至少一个处理器和计算机可读介质。该计算机可读介质包含用于提供蚀刻等离子体以便将特征蚀刻到多孔低K介电层中的计算机可读代码、用于提供沉积等离子体以便在已蚀刻了该特征之后在该特征上形成保护层的计算机可读代码、以及用于从该多孔低K介电层上剥离光致抗蚀剂掩膜的计算机可读代码,其中该剥离除去该保护层的一部分并留下由该保护层形成的小保护壁。
在本发明的另一个表现形式中,提供了一种用于在位于衬底之上的并被置于图形化光致抗蚀剂掩膜之下的多孔低K介电层中形成特征的方法。通过该光致抗蚀剂掩膜将特征蚀刻到该多孔低K介电层内。在蚀刻了该特征之后,在该特征上沉积保护层。剥离该图形化光致抗蚀剂掩膜,使得除去该保护层的一部分,其中由该保护层形成的保护壁保留在该特征中。
下面将在本发明的详细描述中并结合附图更详细地描述本发明的这些和其它特征。
附图说明
在附图的各个图中,通过实例而不是通过限制来阐述本发明;在附图中相似的附图标记表示相似的元件,其中:
图1为本发明实施例中所使用的工艺的流程图。
图2A-2F为根据图1的工艺的、已蚀刻的多孔低K介电层的示意性侧视图。
图3为可以在本发明实施例中使用的处理腔的示意性视图。
图4A-4B为可用作控制器的计算机系统的示意性视图。
具体实施方式
现在将参考如附图中所示的本发明的几个优选实施例来详细地描述本发明。在下面的描述中,阐述了许多具体细节以便提供对本发明的全面理解。然而,对于本领域的技术人员来说显而易见的是,可以不使用这些具体细节中的部分或所有的情况下实践本发明。在其它实例中,没有详细地描述熟知的工艺步骤和/或结构,以便不使本发明不必要地不清楚。
为了便于讨论,图1为本发明优选实施例中所使用的多孔低K介电层的蚀刻工艺的流程图。其中所述小孔为纳米尺寸的小孔。更为优选地,这些小孔为大约1nm至大约10nm。在定义和权利要求中,短语“多孔低K电介质”是介电常数小于2.3的电介质,因为介电常数小于2.3的介电材料通常是多孔的。多孔低K介电材料的一些实例为由日本东京的JSRCorporation制造的JSR LKD-5109低K电介质以及由ShipleyMicroelectronics(为Rohm and Haas of Philadelphia,PA.的子公司)制造的ZirkonTMLK。一些多孔低K介电材料基于有机硅玻璃(OSG)。其它多孔低K介电材料为多孔SILK、不含硅的纯有机材料。图2A-2D为根据图1的工艺的多孔低K介电层的示意性侧视图。如图2A中所示,多孔介电层204可被沉积在衬底208上(步骤104)。衬底208可以是硅晶片或其它类型的材料,或者可以是晶片上的层的一部分。盖层212形成于多孔介电层204上(步骤108)。盖层212可以是氧化硅。通常,该盖层为由介电材料形成的保护层。盖层212在化学机械抛光(CMP)和其它工艺过程中保护多孔介电层204。盖层212可以是低K电介质,因为该盖层是最终产品的一部分。优选地,该盖层由氧化硅基材料形成。该盖层优选地具有在大约200和大约1000之间的厚度。抗反射涂层(ARC)214被沉积于盖层212上(步骤212)。抗反射涂层(ARC)214可以是有机底部抗反射涂层(BARC)或无机电介质抗反射涂层(DARC)。ARC具有在大约100和大约1000之间的厚度。在ARC 214上提供图形化抗蚀剂掩膜216(步骤116)。图形化抗蚀剂掩膜216具有孔220。可以通过配置光致抗蚀剂层来形成该图形化抗蚀剂掩膜,其中该光致抗蚀剂层被暴露于光图形中并且随后被蚀刻。可以使用其它形成图形化抗蚀剂掩膜的方法。衬底208可以具有接触209和阻挡层210。
衬底208可被置于蚀刻腔内,在该蚀刻腔内蚀刻多孔介电层204(步骤120)。等离子体干法蚀刻可被用于蚀刻多孔介电层204,这在图形化抗蚀剂掩膜216中的孔220下形成开口224,如图2B中所示。在多孔介电层蚀刻期间,除去一些图形化抗蚀剂掩膜216。这种多孔电介质蚀刻可采用化学蚀刻,例如使用基于氟的蚀刻剂。例如,蚀刻化学物(chemistry)可使用低压下的C4F8和N2。因此,可以蚀刻特征的侧壁。此外,这种蚀刻可以在蚀刻过程中沉积聚合物。这种蚀刻可以使用一些O2,但O2的量通常将小于剥离工艺中所使用的O2的量。由于O2的量小且压力被保持得低,蚀刻化学物对多孔电介质的损伤小于剥离工艺将造成的损伤。
保护层228随后被沉积在已蚀刻的特征上(步骤124),如图2C中所示。在优选实施例中,通过聚合物沉积形成该保护层。这种聚合物沉积化学物可使用C2H4与N2或CH4与O2的沉积化学物。为了避免损伤暴露的多孔电介质,优选的是将无氟化学物用于聚合物形成。优选地,聚合物沉积的厚度在大约100和1500之间。更为优选地,聚合物沉积的厚度在大约200和800之间。最优选地,聚合物沉积的厚度在大约200和500。
图形化抗蚀剂掩膜216利用剥离被剥离,该剥离也除去保护层的一部分,在特征224内留下由保护层形成的保护壁230以保护该多孔电介质(步骤128),如图2D中所示。典型的光致抗蚀剂剥离化学物使用基于O2、NH3、或N2H2的剥离化学物。这些剥离化学物能够扩散穿过小孔并导致对暴露表面之下深处的多孔低K电介质的有机成分的损伤,从而导致对低K电介质的基本部分的损伤。然而,保护壁230提供对多孔介电层204的保护,使得在剥离工艺过程中不存在多孔介电层的暴露表面。保护壁230足够薄以避免粘附失败。如果保护壁太厚,则保护壁可能分层从而导致粘附问题。另一方面,如果原始保护层太薄,则将存在对多孔介电层的不充足的保护。通常,可作为蚀刻步骤的结果而形成的侧壁太薄以致不能提供对多孔介电层的足够保护,这就是在完成蚀刻之后需要进行聚合物沉积步骤的原因。优选地,在剥离过程中使用离子轰击,以便择优地除去保护层的上表面而不除去保护壁。
在本发明的一些实施例中,可在剥离光致抗蚀剂216之后打开阻挡层210。保护壁230可以在阻挡层210打开期间进一步保护该多孔介电层。下一层接着形成于保护壁230上(步骤132)。在一个实例中,在保护壁230上形成阻挡层240,如图2E中所示,并在该特征之内和之上形成铜接触层244。使用化学机械抛光来除去阻挡层240和铜接触层244的过量部分以形成铜246,如图2F中所示。
图3为等离子体处理腔300的示意性视图,该处理腔可被用于蚀刻特征、随后沉积保护层、并且随后在原处剥离光致抗蚀剂。等离子体处理腔300包含限制环302、上电极304、下电极308、气体源310、和排气泵320。气体源310包含蚀刻剂气体源312、保护层气体源316、以及剥离气体源318。气体源310可包含附加的气体源。在等离子体处理腔300内,衬底208被置于下电极308之上。下电极308包含用于保持衬底208的适当的衬底夹具机构(例如静电、机械夹具等)。反应器顶部328包含上电极304,该上电极被布置成和下电极308直接相对。上电极304、下电极308、和限制环302定义受限制的等离子体容积。气体由气体源310供应给受限制的等离子体容积,并通过排气泵320经由限制环302和排气口从受限制的等离子体容积中排出。第一RF源344电连接到上电极304。第二RF源348电连接到下电极308。腔壁352包围限制环302、上电极304、和下电极308。第一RF源344和第二RF源348都可包含27MHz电源和2MHz电源。可以实现将RF电源连接到电极的不同组合。在本发明的优选实施例中可以使用由California,Fremont的LAMResearch CorporationTM制造的Exelan 2300TM。
图4A和4B示出计算机系统1300,该计算机系统适合于实现在本发明实施例中所使用的控制器335。图4A示出该计算机系统的一种可能的物理形式。当然,该计算机系统可具有许多物理形式,范围从集成电路、印刷电路板、和小型手持装置直至巨型超级计算机。计算机系统1300包括监视器1302、显示器1304、壳体1306、磁盘驱动器1308、键盘1310、和鼠标1312。磁盘1314为计算机可读介质,用于将数据传送到计算机系统1300以及从计算机系统1300传送数据。
图4B为计算机系统1300的框图的实例。种类广泛的子系统附着到系统总线1320上。处理器1322(也称为中央处理单元或CPU)被耦合到包括存储器1324的存储装置上。存储器1324包含随机存取存储器(RAM)和只读存储器(ROM)。如在本领域中公知的那样,ROM用于将数据和指令单向地传送到CPU,而RAM通常用于双向地传送数据和指令。这些类型的存储器都可以包含下述计算机可读介质中任一适当的计算机可读介质。固定磁盘1326也双向地耦合到CPU 1322上,该固定磁盘提供附加的数据存储容量并且还可包含下述任一计算机可读介质。固定磁盘1326可用于存储程序和数据等,并且固定磁盘1326通常为比主存慢的二级存储介质(例如硬盘)。应理解的是,固定磁盘1326内所保持的信息在适当的情况下可作为虚拟存储器而以标准方式被结合到存储器1324中。可移动磁盘1314可采取下述任一计算机可读介质的形式。
CPU 1322也耦合到各种输入/输出装置、例如显示器1304、键盘1310、鼠标1312、和扬声器1330上。通常,输入/输出装置可以是下述装置中的任意一种:视频显示器、跟踪球、鼠标、键盘、麦克风、触敏显示器、转换器(transducer)卡阅读器、磁带或纸带阅读器、写字板、记录笔、语音或手写识别器、生物读取器、或其它计算机。CPU 1322可选地可以使用网络接口1340而耦合到另一个计算机或远程通信网络。使用这种网络接口,预料到CPU可接收来自网络的信息,或者可在执行上述方法步骤的过程中将信息输出到网络中。此外,可以仅仅在CPU 1322上执行本发明的方法实施例,或者可以在结合参与处理的一部分的远程CPU的、诸如因特网的网络上执行本发明的方法实施例。
此外,本发明的实施例进一步涉及计算机存储产品,该计算机存储产品具有计算机可读介质,该计算机可读介质在其上具有用于执行各种计算机实现的操作的计算机代码。该介质和计算机代码可以是那些为了本发明的目的而专门设计和构造的介质和计算机代码,或者它们可以具有对于计算机软件领域中的技术人员来说公知并且可获得的类型。计算机可读介质的实例包含但不限于:磁性介质,例如硬盘、软盘、和磁带;光学介质,例如CD-ROM和全息装置;磁光介质,例如光软盘;以及专门被配置用于存储和执行程序代码的硬件装置,例如专用集成电路(ASIC)、可编程逻辑装置(PLD)、和ROM以及RAM装置。计算机代码的实例包括例如由编译器产生的机器代码、和包含由计算机利用解释器所执行的更高级代码的文件。计算机可读介质还可以是通过包含在载波中的计算机数据信号所传输的并代表可由处理器执行的指令的序列的计算机代码。
其它实例可使用其它沉积装置。在其它实施例中,可使用特殊蚀刻来除去保护壁230而不损伤多孔介电层204。另外,其它实施例可执行蚀刻、沉积保护层、以及在分离的腔内(离位地)剥离。
尽管上面阐述了沟渠的蚀刻,但本发明也可以被用于蚀刻通路或在已经蚀刻了通路之后蚀刻沟渠,或者在首先已经蚀刻了沟渠之后蚀刻通路。在蚀刻了各个特征之后,在光致抗蚀剂被剥离之前可在该特征上形成保护层。在一些情况中,沉积在保护壁上的下一层可以是光致抗蚀剂掩膜。
实例
在本发明的一个实例中,JSR LKD-5109的多孔介电层被旋转涂敷(spin)到衬底上。氧化硅盖层被沉积到该多孔介电层上。盖层厚度为大约500。有机ARC层形成于该盖层上。图形化光致抗蚀剂掩膜形成于该ARC上。在本实例中,光致抗蚀剂是Shipley的193nm PR。
衬底随后被置于Exelan 2300介电蚀刻器中。特征被蚀刻穿过ARC层和多孔介电层。使用具有10sccm的C4F8和12sccm的O2的蚀刻化学物以蚀刻穿过多孔介电层。腔压被设为大约120mTorr。27MHz的RF源提供1000W。2MHz的RF源提供1000W。
在特征被完全蚀刻之后,在该特征上沉积保护层。这在原处完成。使用具有50sccm的C2H4和5sccm的O2的沉积气体化学物,从而在该特征上形成聚合物沉积。腔压被设为大约120mTorr。27MHz的RF源提供500W。2MHz的RF源提供500W。该沉积持续15秒,以提供厚约300的沉积层。
在沉积了保护层之后,剥离光致抗蚀剂掩膜。这在原处完成。使用具有600sccm的H2和200sccm的N2的剥离气体化学物,以剥离该光致抗蚀剂掩膜。腔压被设为大约300mTorr。27MHz的RF源提供400W。2MHz的RF源提供400W。
尽管已经根据几个优选实施例描述了本发明,但存在落在本发明的范围内的变更、置换、和替代等效物。还应注意到,存在许多实现本发明的方法和设备的替代方式。因此以下的所附的权利要求应被理解为包含落在本发明的实际精神和范围内的所有这种变更、置换、修改、和各种替代等效物。
Claims (18)
1.一种在多孔低K介电层内形成特征的方法,包含:
将多孔低K介电层置于衬底上;
将图形化光致抗蚀剂掩膜置于该多孔低K介电层上;
将特征蚀刻到该多孔低K介电层中;
在蚀刻了该特征之后,在该特征上沉积保护层;以及
剥离该图形化光致抗蚀剂掩膜,使得除去该保护层的一部分,其中由该保护层形成的保护壁保留在该特征中。
2.如权利要求1所述的方法,进一步包含:在放置该光致抗蚀剂掩膜之前将盖层置于该多孔低K介电层上,其中该光致抗蚀剂掩膜被置于该盖层之上。
3.如权利要求1-2中任一权利要求所述的方法,进一步包含在该保护壁上沉积沉积层。
4.如权利要求2-3中任一权利要求所述的方法,进一步包含:在放置该光致抗蚀剂掩膜之前,在该盖层上形成抗反射涂层,其中该光致抗蚀剂掩膜被置于该抗反射涂层之上。
5.如权利要求1-4中任一权利要求所述的方法,其中沉积该保护层包含沉积无氟层。
6.如权利要求1-5中任一权利要求所述的方法,其中沉积该保护层进一步包含沉积聚合物层。
7.如权利要求1-6中任一权利要求所述的方法,其中该保护层的厚度在100至1500之间。
8.如权利要求1-7中任一权利要求所述的方法,其中沉积该聚合物层包含提供具有C2H4和O2的沉积气体。
9.如权利要求1-8中任一权利要求所述的方法,其中剥离包含提供从氢气、氮气、氨气和氧气中的至少一种所选择的剥离气体。
10.如权利要求1-9中任一权利要求所述的方法,其中该多孔低K介电层包含纳米尺寸的小孔。
11.如权利要求1-10中任一权利要求所述的方法,其中剥离包含使用离子轰击。
12.如权利要求11所述的方法,其中离子轰击除去该保护层的顶层,但留下由该保护层形成的保护侧壁。
13.如权利要求1-12中任一权利要求所述的方法,其中沉积于该保护壁之上的沉积层为阻挡层。
14.如权利要求1-13中任一权利要求所述的方法,进一步包含将衬底置于蚀刻腔内,其中在该蚀刻腔内在原处完成蚀刻、沉积保护层、以及剥离图形化光致抗蚀剂掩膜。
15.通过如权利要求1-14中任一权利要求所述的方法形成的半导体装置。
16.一种用于通过衬底上的掩膜在多孔低K介电层内蚀刻特征的设备,包含:
等离子体处理腔,包含:
形成等离子体处理腔围壁的腔壁;
用于在该等离子体处理腔围壁内支承衬底的衬底支承装置;
用于调节该等离子体处理腔围壁内的压力的压力调节器;
用于向该等离子体处理腔围壁供电以维持等离子体的至少一个电极;
用于将气体提供到该等离子体处理腔围壁中的气体入口;以及
用于从该等离子体处理腔围壁中排出气体的气体出口;
与该气体入口流体连接的气体源,
控制器,可控制地连接到气体源、至少一个电极、压力调节器、气体入口、以及气体出口中的至少一个上,该控制器包含:
至少一个处理器;以及
计算机可读介质,该计算机可读介质包含:
用于提供蚀刻等离子体以便将特征蚀刻到多孔低K介电层中的计算机可读代码;
用于提供沉积等离子体以便在已经蚀刻了该特征之后在该特征上形成保护层的计算机可读代码;以及
用于从该多孔低K介电层上剥离光致抗蚀剂掩膜的计算机可读代码,其中该剥离除去保护层的一部分并留下由该保护层形成的保护壁。
17.一种在位于衬底上的并被置于图形化光致抗蚀剂掩膜之下的多孔低K介电层中形成特征的方法,包括:
通过该光致抗蚀剂掩膜将特征蚀刻到该多孔低K介电层中;
在蚀刻了该特征之后,在该特征上沉积保护层;以及
剥离该图形化光致抗蚀剂掩膜,使得除去该保护层的一部分,其中由该保护层形成的保护壁保留在该特征中。
18.如权利要求17所述的方法,其中沉积该保护层进一步包含沉积聚合物层。
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US6919101B2 (en) * | 2003-02-04 | 2005-07-19 | Tegal Corporation | Method to deposit an impermeable film on porous low-k dielectric film |
-
2003
- 2003-12-16 US US10/738,280 patent/US7081407B2/en not_active Expired - Lifetime
-
2004
- 2004-12-01 JP JP2006545700A patent/JP4668205B2/ja not_active Expired - Fee Related
- 2004-12-01 CN CNB2004800375736A patent/CN100524668C/zh active Active
- 2004-12-01 WO PCT/US2004/040267 patent/WO2005060548A2/en active Application Filing
- 2004-12-01 KR KR1020067012218A patent/KR101094681B1/ko not_active IP Right Cessation
- 2004-12-01 EP EP04812717A patent/EP1697984A4/en not_active Withdrawn
- 2004-12-07 TW TW093137791A patent/TWI353019B/zh not_active IP Right Cessation
-
2006
- 2006-06-04 IL IL176101A patent/IL176101A0/en not_active IP Right Cessation
- 2006-06-07 US US11/449,060 patent/US20060240661A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
JP4668205B2 (ja) | 2011-04-13 |
CN100524668C (zh) | 2009-08-05 |
EP1697984A2 (en) | 2006-09-06 |
KR20060114347A (ko) | 2006-11-06 |
US20060240661A1 (en) | 2006-10-26 |
TWI353019B (en) | 2011-11-21 |
US20050130435A1 (en) | 2005-06-16 |
JP2007514327A (ja) | 2007-05-31 |
EP1697984A4 (en) | 2009-12-23 |
WO2005060548A2 (en) | 2005-07-07 |
WO2005060548A3 (en) | 2006-02-23 |
TW200527532A (en) | 2005-08-16 |
KR101094681B1 (ko) | 2011-12-20 |
IL176101A0 (en) | 2006-10-05 |
US7081407B2 (en) | 2006-07-25 |
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