CN1883053A - 应变半导体器件 - Google Patents

应变半导体器件 Download PDF

Info

Publication number
CN1883053A
CN1883053A CNA2004800342569A CN200480034256A CN1883053A CN 1883053 A CN1883053 A CN 1883053A CN A2004800342569 A CNA2004800342569 A CN A2004800342569A CN 200480034256 A CN200480034256 A CN 200480034256A CN 1883053 A CN1883053 A CN 1883053A
Authority
CN
China
Prior art keywords
transistor
layer
band gap
quantum well
conduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2004800342569A
Other languages
English (en)
Inventor
T·J·菲利普斯
T·阿什利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qinetiq Ltd
Original Assignee
Qinetiq Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qinetiq Ltd filed Critical Qinetiq Ltd
Publication of CN1883053A publication Critical patent/CN1883053A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H01L29/7371—Vertical transistors
    • H01L29/7373—Vertical transistors having a two-dimensional base, e.g. modulation-doped base, inversion layer base, delta-doped base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H01L29/7371—Vertical transistors
    • H01L29/7378—Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • H01L29/7784—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material with delta or planar doped donor layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

在多数载流子是空穴的晶体管中，至少一个窄带隙区域或层是p型掺杂的或包括过量的空穴，并承受压缩机械应变，由此空穴迁移率可以显著提高。在p沟道量子阱FET中，量子阱InSb阱p型层5(调制或直接掺杂)位于In1－xAlxSb层4和6之间，其中x是一个值，该值足以向层5引入一定程度的应变，使轻空穴和重空穴被大于kT的量分离。本发明范围内的晶体管，包括双极pnp器件，可以和它们更常用的电子多数载流子对应物在互补逻辑电路中使用。

Description

应变半导体器件
本发明涉及半导体器件，其中窄带隙半导体区域承受应变。
诸如锑化铟InSb之类的窄带隙半导体具有有利的属性，例如极低的电子有效质量、极高的电子迁移率和高饱和速度。这些对于超高速晶体管应用都具有潜在的极大优势。尤其是，对于快速极低功耗晶体管，InSb是很有前途的材料，因为它在低电场下的电子迁移率μe比GaAs高9倍，它的饱和速度Vsat比GaAs高5倍，尽管在这些方面GaAs具有比硅好的属性。还已预测InSb具有超过0.5微米的大的弹道平均自由程。这暗示InSb将很适合高速低电压操作，与之对应的低功耗使它适用于便携式和高器件密度的应用。
向半导体施加应变是改变其特性的一种有效的方法。尽管这主要应用于光电器件例如激光器和光检测器，但US 5,382,814公开了一种MISFET，它包括一个包含15％Al的AlxIn1-xSb层。该层是张应变的，因为向晶格添加Al原子减小了相对于相邻材料的晶格常数。然而，该现有技术p+p+(宽带隙)p-n+结构中，AlxIn1-xSb宽带隙层将用作导带中的势垒以防止电子从p+接触区移动到p-有源区。它不用作在该层中或沿着该层发生载流子输运的层，这里应变的存在对于器件的操作不是十分重要的。
现在应当理解能够构建具有压应变区域或层的晶体管，其中应变的存在有利地影响了晶体管的属性。
因此本发明提供一种晶体管，包括至少一个窄带隙区域或层，该区域或层是p型掺杂的或包含过量的空穴，并承受压缩机械应变。
优选地该窄带隙不大于1.0eV，优选地不大于0.75eV，最优选地不大于0.5eV。在具有这种窄带隙的材料中，应变对能带的影响最有可能大到足够使用的程度。
可以通过使窄带隙区域与至少一个具有不同晶格常数的另外的层或区域相邻，向该窄带隙区域强加压缩机械应变。优选地，在该窄带隙层或区域的两个相对端都存在至少一个另外的层或区域。
根据本发明的器件中，应变区域中的多数载流子将是空穴。一般地，应变区域或层将是使用中允许载流子输运的区域或层，且通常将是其中发生主要载流子输运的区域或层(例如在该层中或沿着该层)。
本发明可以应用到FET，例如p沟道量子阱效应FET，并且也可以应用到双极晶体管，例如npn晶体管。
我们的国际专利申请No.PCT/GB03/01148公开并且要求保护一种量子阱场效应晶体管，其中量子阱由主要传导沟道和至少一个与主要沟道直接相邻并与之接触的次要传导沟道提供，该次要沟道的有效带隙大于主要沟道的有效带隙Eg(有效的)，其中主要沟道和次要沟道之间的有效碰撞电离阈值IIT(有效的)和有效导带偏移ΔEc(有效的)之间差的模数不大于0.5Eg(有效的)。它还公开并且要求保护一种量子阱场效应晶体管，其中量子阱由主要传导沟道和至少一个与主要沟道直接相邻并与之接触的次要传导沟道提供，该次要沟道的有效带隙大于主要沟道的有效带隙Eg(有效的)，其中主要沟道和次要沟道之间的有效碰撞电离阈值IIT(有效的)和有效导带偏移ΔEc(有效的)之间差的模数不大于0.4eV。
我们早先的UK专利申请序列号No.2362506公开并且要求保护一种提取晶体管，其特征在于(a)它是一种场效应晶体管，具有组成至少一部分量子阱的传导区域；(b)当晶体管没有偏置并在正常工作温度下时，该量子阱处于至少部分本征传导状态中；以及(c)它包括至少一个可以偏置的结以减少量子阱中的本征传导并将电荷载流子限制为主要是仅对应于本征饱和状态的一种类型。
我们的国际专利申请No.PCT/GB02/05904公开并且要求保护一种具有垂直几何结构的晶体管，具有提供基极接触的基区、从基区提取少数载流子的发射区和集电区、以及阻止少数载流子通过基极接触进入基区的结构，其中基区的带隙大于0.5eV，掺杂浓度大于1017cm-3。在这种类型的结构中基极可以是压应变的以允许轻空穴输运，这在效率高的npn器件中是必要的。
此外，我们的国际专利申请No.PCT/GB01/02284公开并且要求保护一种双极晶体管，具有从基区提取少数载流子的发射区和集电区，和阻止少数载流子通过基极接触进入基区的结构，基区的带隙小于0.5eV，其中基区的掺杂浓度大于1017cm-3。
但本发明不限于这些现有技术结构，这种量子阱FET和双极晶体管可以基于InSb。这种情况下，具有明显较低晶格常数的AlxIn1-xSb层或多层的存在将分别向量子阱或基区进入强的压应变。InSb材料中的应变效应很强，原则上允许轻空穴和重空穴的能量以大于kT的量分离。因为InSb中轻空穴(处于小于重空穴的较低的能带中)的迁移率和电子的迁移率相当(远大于重空穴的迁移率，而重空穴的迁移率一般支配了无应变InSb中的输运)，这使得能够制备高性能的基于空穴的器件。当后面一种器件与对应的但更常规的基于电子的器件相结合使用时，这允许设计具有良好电路性能和低静态功耗的极高速的低功耗互补逻辑电路。
在InSb中应变效应强，因此用于压应变窄带隙区域的优选材料是InSb。不过，根据本发明在晶体管中可以以相同的方式使用其它材料，例如InAs。
仔细阅读附属的权利要求书，并考虑下面参考附图的关于本发明实施例的更为详细的描述，本发明的其它特征和优点将显而易见。附图中：
图1以图示剖面的形式示出了根据本发明的量子阱FET。
图2形象化地示出了压应变对图1的晶体管中所示类型的量子阱层的影响。
图3示出了图1所述类型的量子阱晶体管的计算的差量。
图4以图示剖面的形式示出了根据本发明的双极晶体管。
图1中，一个可选的用于载流子提取的n型高掺杂的背接触层2直接位于例如GaAs的绝缘衬底1之上。调制掺杂或直接掺杂p型杂质的InSb层5形成In1-xAlxSb层4和6之间的量子阱。如果使用调制掺杂，通过层6和7之间或层3和4之间或它们两者之间的掺杂薄层提供调制掺杂。另一In1-xAlxSb层3位于层4和背接触2之间，且另一In1-xAlxSb层7位于层6上。p型传导沟道的每个端头的连接分别通过p型接触8、9和其上金属接触10、11提供，并提供肖特基栅极(或氧化物基的栅极)12以控制沟道传导。
层4和6中的x值足够高以在层5中引入足够的应变，使得轻空穴和重空穴被远大于kT的量分离。
层厚和x的典型值如下：
层2：厚度0.5-3μm；      x＝0.15-0.30
层3：厚度0.5-0.75μm     x＝0.15-0.30
层4：厚度3-10nm；        x＝0.15-0.30
层5：厚度5-20nm；
层6：厚度3-10nm；        x＝0.15-0.30
层7：厚度10-20nm；       x＝0.15-0.30
图2形象化地示出了压应变对能带结构的影响，例如在图1的一般结构的量子阱晶体管中压应变对能带结构的影响，注意在平面内重空穴和轻空穴相交，而在垂直于平面的方向两个能带分离。
图3示出了图1一般结构量子阱晶体管的计算的平面内子带差量，此种情况InSb量子阱位于In0.81Al0.19Sb势垒之间，阱的厚度分别为5nm(图3(a)和3(b))和10nm(图3(c)和3(d))。图表提供了“重”和“轻”空穴存在的很好的证明。初始计算暗示可以获得1011到1012cm-1范围的薄层空穴密度，空穴迁移率与电子迁移率相当，给出了互补器件电路中器件特性良好匹配的潜力。
图4示出了npn双极晶体管，其中基区19是p型掺杂的InSb。基极还包括p+层14之上的基极接触金属13。另一p+层15位于区域19和层14之间并与它们接触。发射极包括n+层17上的发射极接触金属16。另一n+层18位于层17和基区19之间并与它们接触。集电极包括位于半绝缘衬底23和n收集层20之间并与它们接触的n+层22。在层22上有欧姆接触金属层21，层20位于层22和基区19之间并与它们接触。每个层15、18、20和22都是宽带隙AlxIn1-xSb，它们的存在向窄带隙基极层19施加了压应变。该结构允许基极层20应变，由此提供轻空穴输运并允许具有较低基区存取电阻的较快速器件速度，获得改善的功率增益。
层厚和x的典型值如下：
层14：厚度5-20nm
层15：厚度5-20nm     x＝0.15-0.30
层17：厚度5-20nm
层18：厚度5-20nm      x＝0.15-0.30
层19：厚度5-20nm
层20：厚度0.3-2μm；  x＝0.15-0.30
层22：厚度0.5-5μm；  x＝0.15-0.30 收集极

Claims (15)

1.一种包括至少一个窄带隙区域或层的晶体管，该窄带隙区域或层是p型掺杂的或包含过量的空穴，并承受压缩机械应变。
2.根据权利要求1所述的晶体管，其中布置所述窄带隙区域或层用于多数载流子输运。
3.根据权利要求1或2所述的晶体管，其中所述窄带隙区域或层与至少另一个具有不同晶格常数的区域或层接触，由此所述窄带隙区域或层承受所述压缩机械应变。
4.根据前述任一权利要求所述的晶体管，其中存在至少两个所述另外的层，在所述窄带隙区域或层的两端都有一个所述另外的层。
5.根据前述任一权利要求所述的晶体管，其中所述窄带隙区域或层包括InSb或InAs。
6.根据前述任一权利要求所述的晶体管，其中所述晶体管是量子阱FET。
7.根据权利要求6的晶体管，其中量子阱由主要传导沟道和至少一个与主要传导沟道直接相邻并与之接触的次要传导沟道提供，该次要沟道的有效带隙大于主要沟道的有效带隙Eg(有效的)，其中主要沟道和次要沟道之间的有效碰撞电离阈值IIT(有效的)和有效导带偏移ΔEc(有效的)之间的差的模数不大于0.5Eg(有效的)。
8.根据权利要求7的晶体管，其中量子阱由主要传导沟道和至少一个与主要传导沟道直接相邻并接触的次要传导沟道提供，该次要沟道的有效带隙大于主要沟道的有效带隙Eg(有效的)，其中主要沟道和次要沟道之间的有效碰撞电离阈值IIT(有效的)和有效导带偏移ΔEc(有效的)之间的差的模数不大于0.4eV。
9.根据权利要求6的提取晶体管形式的晶体管，其特征在于(a)它是一种场效应晶体管，具有组成至少一部分量子阱的传导区域；(b)当晶体管没有偏置并在正常工作温度下时，该量子阱处于至少部分本征传导状态中；以及(c)它包括至少一个可以偏置的结以减少量子阱中的本征传导并将电荷载流子限制为主要是仅对应于本征饱和状态的一种类型。
10.根据权利要求1到5中任一项所述的晶体管，其中晶体管是npn双极晶体管。
11.根据权利要求10的具有垂直几何结构的晶体管，具有提供基极接触的基区、从基区提取少数载流子的发射区和集电区、以及阻止少数载流子通过基极接触进入基区的结构，其中基区的带隙大于0.5eV，掺杂浓度大于1017cm-3。
12.根据前述任一权利要求所述的晶体管，其中窄带隙不大于1.0eV。
13.互补逻辑电路，包括根据前述任一权利要求所述的晶体管。
14.一种集成电路，包括根据权利要求1到12中任一项的晶体管或根据权利要求13的互补逻辑电路。
15.一种晶体管，此前参考附图的图1或图4基本得以描述。
CNA2004800342569A 2003-11-20 2004-11-08 应变半导体器件 Pending CN1883053A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0326993.3 2003-11-20
GBGB0326993.3A GB0326993D0 (en) 2003-11-20 2003-11-20 Strained semiconductor devices

Publications (1)

Publication Number Publication Date
CN1883053A true CN1883053A (zh) 2006-12-20

Family

ID=29764124

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2004800342569A Pending CN1883053A (zh) 2003-11-20 2004-11-08 应变半导体器件

Country Status (8)

Country Link
US (1) US7960755B2 (zh)
EP (1) EP1685601A1 (zh)
JP (1) JP2007511915A (zh)
KR (1) KR20060094980A (zh)
CN (1) CN1883053A (zh)
CA (1) CA2546198A1 (zh)
GB (1) GB0326993D0 (zh)
WO (1) WO2005053030A1 (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101982731A (zh) * 2010-10-21 2011-03-02 天津大学 一种柔性薄膜微波应变传感器
CN101995235A (zh) * 2010-10-21 2011-03-30 天津大学 一种基于微波二极管的动态应变测量装置
CN102804382A (zh) * 2009-04-14 2012-11-28 秦内蒂克有限公司 P型半导体器件
CN103377918A (zh) * 2012-04-27 2013-10-30 中芯国际集成电路制造(上海)有限公司 Npn异质结双极晶体管及其制造方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2469448A (en) * 2009-04-14 2010-10-20 Qinetiq Ltd Strain Control in Semiconductor Devices
KR101438773B1 (ko) 2012-12-18 2014-09-15 한국과학기술연구원 자기장 제어 가변형 논리 소자 및 그 제어 방법

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2189345A (en) 1986-04-16 1987-10-21 Philips Electronic Associated High mobility p channel semi conductor devices
JPS6351678A (ja) * 1986-08-20 1988-03-04 Nec Corp 半導体装置
JPS649656A (en) * 1987-07-02 1989-01-12 Nec Corp Bipolar transistor
US5241197A (en) * 1989-01-25 1993-08-31 Hitachi, Ltd. Transistor provided with strained germanium layer
JP2800299B2 (ja) 1989-08-31 1998-09-21 横河電機株式会社 ヘテロ構造半導体装置
JPH03187269A (ja) * 1989-12-18 1991-08-15 Hitachi Ltd 半導体装置
US5298441A (en) * 1991-06-03 1994-03-29 Motorola, Inc. Method of making high transconductance heterostructure field effect transistor
JPH0653255A (ja) 1992-07-31 1994-02-25 Sanyo Electric Co Ltd 半導体ヘテロ構造
JP3187269B2 (ja) 1994-12-12 2001-07-11 株式会社ホンダロック ロック装置
GB2362506A (en) 2000-05-19 2001-11-21 Secr Defence Field effect transistor with an InSb quantum well and minority carrier extraction
GB0012925D0 (en) 2000-05-30 2000-07-19 Secr Defence Bipolar transistor
US20020163013A1 (en) 2000-09-11 2002-11-07 Kenji Toyoda Heterojunction bipolar transistor
GB0206572D0 (en) * 2002-03-20 2002-05-01 Qinetiq Ltd Field effect transistors
US7998807B2 (en) * 2003-08-22 2011-08-16 The Board Of Trustees Of The University Of Illinois Method for increasing the speed of a light emitting biopolar transistor device
DE102005020319B4 (de) * 2005-05-02 2010-06-17 Infineon Technologies Ag Verstärkeranordnung mit einem umschaltbaren Verstärkungsfaktor und Verfahren zum Verstärken eines zu verstärkenden Signals mit einem umschaltbaren Verstärkungsfaktor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102804382A (zh) * 2009-04-14 2012-11-28 秦内蒂克有限公司 P型半导体器件
CN101982731A (zh) * 2010-10-21 2011-03-02 天津大学 一种柔性薄膜微波应变传感器
CN101995235A (zh) * 2010-10-21 2011-03-30 天津大学 一种基于微波二极管的动态应变测量装置
CN101982731B (zh) * 2010-10-21 2012-05-23 天津大学 一种柔性薄膜微波应变传感器
CN101995235B (zh) * 2010-10-21 2012-07-18 天津大学 一种基于微波二极管的动态应变测量装置
CN103377918A (zh) * 2012-04-27 2013-10-30 中芯国际集成电路制造(上海)有限公司 Npn异质结双极晶体管及其制造方法
CN103377918B (zh) * 2012-04-27 2015-10-21 中芯国际集成电路制造(上海)有限公司 Npn异质结双极晶体管及其制造方法

Also Published As

Publication number Publication date
US7960755B2 (en) 2011-06-14
CA2546198A1 (en) 2005-06-09
EP1685601A1 (en) 2006-08-02
GB0326993D0 (en) 2003-12-24
US20070029574A1 (en) 2007-02-08
WO2005053030A1 (en) 2005-06-09
KR20060094980A (ko) 2006-08-30
JP2007511915A (ja) 2007-05-10

Similar Documents

Publication Publication Date Title
JP3443343B2 (ja) 半導体装置
US7355254B2 (en) Pinning layer for low resistivity N-type source drain ohmic contacts
EP0033037B1 (en) Heterojunction semiconductor devices
CN1220272C (zh) 载流子提取晶体管
US7394112B2 (en) Heterostructure with rear-face donor doping
KR850005154A (ko) 화합물 반도체 집적회로 장치
EP0482726B1 (en) Heterojunction field-effect transistor
EP0566591B1 (en) Semiconductor device
JP3530521B2 (ja) 半導体装置
CN1883053A (zh) 应变半导体器件
EP0326832A1 (en) Atomic planar-doped field-effect transistor
US4600932A (en) Enhanced mobility buried channel transistor structure
US20020030202A1 (en) High-breakdown voltage heterostructure field-effect transistor for high temperature operations
EP0200933A1 (en) Heterojunction transistor having bipolar characteristics
JPH088353B2 (ja) 二次元ヘテロ接合素子
Visciarelli et al. Impact of traps and strain on optimized n-and p-type TFETs integrated on the same InAs/AlGaSb technology platform
Lin et al. A scaling study of excess OFF-state current in InGaAs quantum-well MOSFETs
US7173292B2 (en) Field effect transistor
US5751029A (en) Field-effect semiconductor device having heterojunction
JPH08255898A (ja) 半導体装置
JP2001085672A (ja) 電界効果型半導体装置
JP2004200423A (ja) バイポーラトランジスタ
EP0237029A2 (en) A heterojunction field effect device operable at a high output current with a high withstand voltage
EP0203493B1 (en) Field effect transistor
Macherla et al. GaSb/Si Heterojunction Based Pocket Engineered Vertical Non-Uniform Channel Double Gate TFETs for Low Power Applications

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
REG Reference to a national code

Ref country code: HK

Ref legal event code: DE

Ref document number: 1097651

Country of ref document: HK

C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication
REG Reference to a national code

Ref country code: HK

Ref legal event code: WD

Ref document number: 1097651

Country of ref document: HK