CN1832110A - 外延生长方法 - Google Patents

外延生长方法 Download PDF

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CN1832110A
CN1832110A CNA200510131733XA CN200510131733A CN1832110A CN 1832110 A CN1832110 A CN 1832110A CN A200510131733X A CNA200510131733X A CN A200510131733XA CN 200510131733 A CN200510131733 A CN 200510131733A CN 1832110 A CN1832110 A CN 1832110A
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朴性秀
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Corning Precision Materials Co Ltd
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Abstract

提供了一种用于形成高质量外延生长半导体晶片的外延生长方法。该方法包括：在单晶晶片上形成单晶层；在单晶层上形成具有纳米尺寸点的掩模层；通过蚀刻掩模层和单晶层的表面形成具有纳米尺寸气孔的多孔缓冲层；退火多孔缓冲层；以及利用外延生长工艺在多孔缓冲层上形成外延材料层。根据本发明，利用刻蚀工艺在单晶晶片上形成了具有多孔缓冲层的外延材料层。由于该多孔缓冲层是利用刻蚀工艺和退火工艺形成的，因此晶片可以由多种材料形成。而且，本发明降低了外延生长衬底的缺陷密度、应力和弯曲程度，从而能够形成高质量的半导体晶片并提高成品率。

Description

外延生长方法
技术领域
本发明涉及一种外延生长方法，尤其涉及一种GaN外延生长方法。
背景技术
利用外延生长方法在衬底上形成外延层，衬底可能会弯曲，且由于晶格失配以及衬底和外延层之间热膨胀系数的差异在外延层中可能会产生许多晶体缺陷。因此，在使用外延生长方法形成单晶半导体材料层时必须克服上述问题。
美国专利No.6579359公开了一项利用多孔缓冲层(porous bufferlayer)吸收内应力的技术。在该技术中，多孔缓冲层形成于SiC衬底上，而外延层形成于多孔缓冲层上。由于缓冲层是多孔的，因此它吸收了由晶格失配引起的应力。
不过，由于多孔缓冲层是利用阳极氧化工艺形成的，因此应当使用导电衬底，这样就只有有限种类的材料可以用作衬底。而且，阳极氧化法非常复杂而昂贵。
发明内容
本发明提供了一种通过容易地形成多孔缓冲层以低成本形成半导体外延层的方法。
根据本发明的一方面，提供了一种外延生长方法，包括：在单晶晶片上形成单晶层；在所述单晶层上形成具有纳米尺寸点的掩模层；通过蚀刻所述掩模层和所述单晶层的表面形成具有纳米尺寸气孔的多孔缓冲层；退火所述多孔缓冲层；以及利用外延生长工艺在所述多孔缓冲层上形成外延材料层。
在本发明中，所述外延材料层可以由III族氮化物半导体形成。
而且，所述单晶晶片可以由Si、GaAs、SiC、GaN和Al2O3之一形成。优选地，所述单晶晶片可以由Al2O3形成，且所述单晶层和所述外延材料层可以由GaN形成。
在一个实施例中，所述掩模层可以由Si、诸如Al、Co、Cr和Pt的金属或金属的氧化物形成。
在另一个实施例中，所述掩模层可以由比所述单晶层具有更低蚀刻速率的材料形成。
所述外延材料层可以利用气相淀积工艺形成，具体地，可以利用卤素或氢化物气相外延(HVPE)工艺、金属有机化学气相淀积(MOCVD)和分子束外延(MBE)工艺之一形成。
附图说明
通过参考附图详细描述本发明的示范性实施例，本发明的上述和其他特征和优势将变得更加明显，附图中：
图1到5是示出根据本发明示范性实施例的外延生长方法的截面图。
具体实施方式
现在将在下文中参考附图更全面地描述根据本发明的外延生长方法，附图中示出了本发明的示范性实施例。
参考图1，在制备好的单晶晶片1上形成单晶半导体层2，例如，III族氮化物半导体层，具体地说，GaN层(在下文中使用GaN层2)。在这种情况下，单晶晶片1可以由，例如Si、GaAs、SiC、GaN或Al2O3(蓝宝石)形成。而且，GaN层2可以通过堆叠与晶片1的材料种类相同的材料形成。例如，GaN层2可以通过在GaN晶片上生长GaN结晶层形成。或者，GaN层2可以通过堆叠与晶片1的材料种类不同的材料形成。例如，GaN层2可以通过在Al2O3晶片上生长GaN结晶层形成。
具体而言，为了形成GaN层2，将Al2O3晶片1载入卤素或氢化物气相外延(HVPE)反应器中，并将反应器的内部温度升高到大约1050℃的生长温度。
尔后，以1∶20的比例将III族材料和IV族材料，即，GaCl和NH3与N2气混合，并将混合物注入反应器约3分钟，使得GaN层2在Al2O3晶片1上生长到2到3μm的厚度。之后，将反应器冷却到室温，并从反应器中载出其上形成有GaN层2的Al2O3晶片1。
参考图2，在GaN层2上形成具有纳米尺寸点3a的掩模层3。掩模层3可以由Si、诸如Al、Co、Cr和Pt的金属或金属的氧化物形成。当掩模层3由Si形成时，它是通过在GaN层2淀积Si纳米颗粒形成的，纳米颗粒是利用气溶胶(aerosol)或灼烧(pyrosis)形成的。当掩模层3由金属形成时，它是通过淀积过程获得的。此外，当掩模层3由金属氧化物形成时，它是通过金属淀积过程或氧化过程获得的。能够通过调节淀积厚度控制掩模层3的点3a的尺寸。
参考图3，利用刻蚀工艺在GaN层2上形成多孔缓冲层2a。为了形成多孔缓冲层2a，使用对于GaN层2比掩模层3具有更高溶解度的蚀刻剂。因此，未被点3a覆盖的GaN层2的部分以高速率被蚀刻，而掩模层3以低速率被蚀刻。刻蚀工艺继续直到完全除去掩模层3且气孔2a′形成至几十nm的直径和深度为止。结果，如图3所示，在GaN层2的表面上形成了预定厚度的具有纳米尺寸气孔2a′的多孔缓冲层2a。
参考图4，利用快速热退火(RTA)工艺对其中形成有多孔缓冲层2a的GaN层2退火。为了这一工艺，将Al2O3晶片1载入保持在NH3气氛中的炉中，然后在850℃或更高的温度下退火。结果，形成于缓冲层2a的表面中的(即，形成于GaN层2上的)气孔2a′大部分闭合，缓冲层2a的表面(即，GaN层2的表面)平坦化了。
参考图5，利用典型的外延生长工艺在缓冲层2a上形成期望的外延材料层4。外延材料层4可以由与其下方的GaN层2种类相同或不同的材料形成。优选地，外延材料层4可以在GaN层2上由III族氮化物半导体形成，例如GaN。在这种情况下，将Al2O3晶片1载入HVPE反应器中，在HCl和Ga之间发生反应，从而生成GaCl，且在GaCl和NH3气体之间发生反应，从而在GaN层2的表面上生长厚度为几个μm的GaN外延材料层4。在外延生长工艺期间，控制工艺条件，使得在水平方向上测量到的外延生长速率高于在垂直方向上测量到的外延生长速率。
一旦外延生长工艺结束，将HVPE反应器冷却至室温，并从HVPE反应器中载出其上生长有GaN半导体外延材料层4的Al2O3晶片1。
当通过上述工艺实际形成了GaN外延材料层时，获得了以下测量结果。即，GaN外延材料层具有大约5×107/cm2的缺陷密度，这小于常规的5×109/cm2的缺陷密度，GaN外延材料层还具有常规GaN层约1/5的应变应力。
可以在经历过上述工艺的晶片1上直接形成光学器件。或者，为了获得独立的GaN晶片，可以再次将Al2O3晶片1载入HVPE反应器，并可以进一步在GaN外延材料层4上生长另一个GaN外延材料层至大约300μm或更大的厚度。随后，可以利用公知的激光剥离工艺(laser lift-off process)除去Al2O3晶片1，从而获得缺陷密度大约为5×105/cm2的高质量的独立GaN晶片。
根据本发明，利用刻蚀工艺在单晶晶片上形成了具有多孔缓冲层的外延材料层。具体地，在晶片上形成掩模层以获得具有多孔缓冲层的外延材料层。由于该多孔缓冲层是利用刻蚀工艺和退火工艺形成的，因此晶片可以由多种材料形成。
而且，本发明降低了外延生长衬底的缺陷密度、应力和弯曲程度，从而能够形成高质量的半导体晶片并提高成品率。此外，由于上述物理性能的改善，有可能制造更大直径的外延生长半导体晶片。
此外，本发明适用于在另一衬底上非独立地形成的单晶半导体晶片，例如，III族氮化物半导体晶片，如GaN晶片。
尽管已经参考本发明的示范性实施例展示和描述了本发明，本领域的普通技术人员应当理解，在不背离由权利要求所界定的本发明的精神和范围的情况下可以在其中做出许多形式和细节上的变化。

Claims (9)

1.一种外延生长方法，包括：
在单晶晶片上形成单晶层；
在所述单晶层上形成具有纳米尺寸点的掩模层；
通过蚀刻所述掩模层和所述单晶层的表面形成具有纳米尺寸气孔的多孔缓冲层；
退火所述多孔缓冲层；以及
利用外延生长工艺在所述多孔缓冲层上形成外延材料层。
2.根据权利要求1所述的方法，其中所述外延材料层由III族氮化物半导体形成。
3.根据权利要求1所述的方法，其中所述单晶晶片由从Si、GaAs、SiC、GaN和Al2O3构成的组中选择的一种形成。
4.根据权利要求1到3中任一项所述的方法，其中所述单晶晶片由Al2O3形成，且所述单晶层和所述外延材料层由GaN形成。
5.根据权利要求4所述的方法，其中所述掩模层由Si、Al、Co、Cr和Pt构成的组中选择的一种形成。
6.根据权利要求1所述的方法，其中所述掩模层由比所述单晶层具有更低蚀刻速率的材料形成。
7.根据权利要求1所述的方法，其中所述外延材料层是利用气相淀积工艺形成的。
8.根据权利要求7所述的方法，其中所述气相淀积工艺是从由卤素或氢化物气相外延工艺、金属有机化学气相淀积和分子束外延工艺构成的组中选择的一种。
9.根据权利要求1所述的方法，其中所述多孔缓冲层的退火是在850℃或更高温度下进行的。
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